[COMMON] clocksource: exynos_mct: use only as clockevent
authorHosung Kim <hosung0.kim@samsung.com>
Sun, 9 Apr 2017 09:10:31 +0000 (18:10 +0900)
committerJaehyoung Choi <jkkkkk.choi@samsung.com>
Wed, 2 May 2018 02:15:19 +0000 (11:15 +0900)
This commit set exynos_mct to use clockevent only.

Change-Id: Ie1a103f2a3b5b6283a868f542e1ab0337242d26f
Signed-off-by: Hosung Kim <hosung0.kim@samsung.com>
drivers/clocksource/exynos_mct.c

index 7a244b681876d3895e1e8f010f58c14e21c4d535..d828795a612cdede5bbbe2b0002a48c8f1c63b8b 100644 (file)
@@ -194,6 +194,8 @@ static u64 exynos4_read_count_64(void)
  *
  * Returns the number of cycles in the global counter (lower 32 bits).
  */
+
+#if !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)
 static u32 notrace exynos4_read_count_32(void)
 {
        return readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_L);
@@ -222,6 +224,7 @@ static u64 notrace exynos4_read_sched_clock(void)
 {
        return exynos4_read_count_32();
 }
+#endif
 
 #if defined(CONFIG_ARM)
 static struct delay_timer exynos4_delay_timer;
@@ -243,12 +246,12 @@ static int __init exynos4_clocksource_init(void)
        exynos4_delay_timer.freq = clk_rate;
        register_current_timer_delay(&exynos4_delay_timer);
 #endif
-
+#if !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)
        if (clocksource_register_hz(&mct_frc, clk_rate))
                panic("%s: can't register clocksource\n", mct_frc.name);
 
        sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
-
+#endif
        return 0;
 }