*
* Returns the number of cycles in the global counter (lower 32 bits).
*/
+
+#if !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)
static u32 notrace exynos4_read_count_32(void)
{
return readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_L);
{
return exynos4_read_count_32();
}
+#endif
#if defined(CONFIG_ARM)
static struct delay_timer exynos4_delay_timer;
exynos4_delay_timer.freq = clk_rate;
register_current_timer_delay(&exynos4_delay_timer);
#endif
-
+#if !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)
if (clocksource_register_hz(&mct_frc, clk_rate))
panic("%s: can't register clocksource\n", mct_frc.name);
sched_clock_register(exynos4_read_sched_clock, 32, clk_rate);
-
+#endif
return 0;
}