drm/i915: use HAS_DDI on intel_hdmi.c and intel_display.c
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Mon, 18 Feb 2013 22:00:23 +0000 (19:00 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 20 Feb 2013 00:33:45 +0000 (01:33 +0100)
Since basically every code called on these places comes from
intel_ddi.c

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_hdmi.c

index 7b8bfe8982e6af228e48ebc1ee79ccd22e174dee..770ec90e37a5a9b3c53e56ad3e43dfe06548bcf5 100644 (file)
@@ -332,7 +332,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq)
        uint32_t status;
        bool done;
 
-       if (IS_HASWELL(dev)) {
+       if (HAS_DDI(dev)) {
                switch (intel_dig_port->port) {
                case PORT_A:
                        ch_ctl = DPA_AUX_CH_CTL;
@@ -387,7 +387,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
         */
        pm_qos_update_request(&dev_priv->pm_qos, 0);
 
-       if (IS_HASWELL(dev)) {
+       if (HAS_DDI(dev)) {
                switch (intel_dig_port->port) {
                case PORT_A:
                        ch_ctl = DPA_AUX_CH_CTL;
@@ -842,7 +842,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
        intel_link_compute_m_n(intel_crtc->bpp, lane_count,
                               mode->clock, adjusted_mode->clock, &m_n);
 
-       if (IS_HASWELL(dev)) {
+       if (HAS_DDI(dev)) {
                I915_WRITE(PIPE_DATA_M1(cpu_transcoder),
                           TU_SIZE(m_n.tu) | m_n.gmch_m);
                I915_WRITE(PIPE_DATA_N1(cpu_transcoder), m_n.gmch_n);
@@ -1537,7 +1537,7 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing)
 {
        struct drm_device *dev = intel_dp_to_dev(intel_dp);
 
-       if (IS_HASWELL(dev)) {
+       if (HAS_DDI(dev)) {
                switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
                case DP_TRAIN_VOLTAGE_SWING_400:
                        return DP_TRAIN_PRE_EMPHASIS_9_5;
@@ -1745,7 +1745,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP)
        uint32_t signal_levels, mask;
        uint8_t train_set = intel_dp->train_set[0];
 
-       if (IS_HASWELL(dev)) {
+       if (HAS_DDI(dev)) {
                signal_levels = intel_hsw_signal_levels(train_set);
                mask = DDI_BUF_EMP_MASK;
        } else if (IS_GEN7(dev) && is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) {
@@ -1776,7 +1776,7 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
        int ret;
        uint32_t temp;
 
-       if (IS_HASWELL(dev)) {
+       if (HAS_DDI(dev)) {
                temp = I915_READ(DP_TP_CTL(port));
 
                if (dp_train_pat & DP_LINK_SCRAMBLING_DISABLE)
index 5a6138c62fe997f1b2d31211747fdb277372f645..ed65c6ddf5a2b42d0a61e64ec3ab071bfeff83a9 100644 (file)
@@ -1044,7 +1044,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
        } else if (IS_VALLEYVIEW(dev)) {
                intel_hdmi->write_infoframe = vlv_write_infoframe;
                intel_hdmi->set_infoframes = vlv_set_infoframes;
-       } else if (IS_HASWELL(dev)) {
+       } else if (HAS_DDI(dev)) {
                intel_hdmi->write_infoframe = hsw_write_infoframe;
                intel_hdmi->set_infoframes = hsw_set_infoframes;
        } else if (HAS_PCH_IBX(dev)) {