i2c: exynos5: separate driver data structure to header file
authorYoungmin Nam <youngmin.nam@samsung.com>
Wed, 23 Dec 2015 09:26:12 +0000 (18:26 +0900)
committermyung-su.cha <myung-su.cha@samsung.com>
Wed, 9 May 2018 12:14:45 +0000 (21:14 +0900)
Change-Id: I4a7d24acff0ef7b3439a75691537c844392146e4
Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
drivers/i2c/busses/i2c-exynos5.c
drivers/i2c/busses/i2c-exynos5.h [new file with mode: 0644]

index 35ebbecc6a8d3193cd75764ad100758a9f1ccd74..4378ecdc8dc0aea51485426d4cd51708710d1439 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_gpio.h>
 #include "../../pinctrl/core.h"
+#include "i2c-exynos5.h"
 
 #include <soc/samsung/exynos-powermode.h>
 #ifdef CONFIG_CPU_IDLE
@@ -198,50 +199,6 @@ static LIST_HEAD(drvdata_list);
 
 #define EXYNOS5_HSI2C_RUNTIME_PM_DELAY (100)
 
-struct exynos5_i2c {
-       struct list_head        node;
-       struct i2c_adapter      adap;
-       unsigned int            need_hw_init;
-       unsigned int            suspended:1;
-
-       struct i2c_msg          *msg;
-       struct completion       msg_complete;
-       unsigned int            msg_ptr;
-       unsigned int            msg_len;
-
-       unsigned int            irq;
-
-       void __iomem            *regs;
-       struct clk              *clk;
-       struct clk              *rate_clk;
-       struct device           *dev;
-       int                     state;
-
-       /*
-        * Since the TRANS_DONE bit is cleared on read, and we may read it
-        * either during an IRQ or after a transaction, keep track of its
-        * state here.
-        */
-       int                     trans_done;
-
-       /* Controller operating frequency */
-       unsigned int            fs_clock;
-       unsigned int            hs_clock;
-
-       /*
-        * HSI2C Controller can operate in
-        * 1. High speed upto 3.4Mbps
-        * 2. Fast speed upto 1Mbps
-        */
-       int                     speed_mode;
-       int                     operation_mode;
-       int                     bus_id;
-       int                     scl_clk_stretch;
-       int                     stop_after_trans;
-       unsigned int            transfer_delay;
-       int                     idle_ip_index;
-};
-
 static const struct of_device_id exynos5_i2c_match[] = {
        { .compatible = "samsung,exynos5-hsi2c" },
        {},
diff --git a/drivers/i2c/busses/i2c-exynos5.h b/drivers/i2c/busses/i2c-exynos5.h
new file mode 100644 (file)
index 0000000..70a6bcb
--- /dev/null
@@ -0,0 +1,58 @@
+/**
+ * i2c-exynos5.h - Samsung Exynos5 I2C Controller Driver Header file
+ *
+ * Copyright (C) 2015 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __I2C_EXYNOS5_H
+#define __I2C_EXYNOS5_H
+
+struct exynos5_i2c {
+       struct list_head        node;
+       struct i2c_adapter      adap;
+       unsigned int            need_hw_init;
+       unsigned int            suspended:1;
+
+       struct i2c_msg          *msg;
+       struct completion       msg_complete;
+       unsigned int            msg_ptr;
+       unsigned int            msg_len;
+
+       unsigned int            irq;
+
+       void __iomem            *regs;
+       struct clk              *clk;
+       struct clk              *rate_clk;
+       struct device           *dev;
+       int                     state;
+
+       /*
+        * Since the TRANS_DONE bit is cleared on read, and we may read it
+        * either during an IRQ or after a transaction, keep track of its
+        * state here.
+        */
+       int                     trans_done;
+
+       /* Controller operating frequency */
+       unsigned int            fs_clock;
+       unsigned int            hs_clock;
+
+       /*
+        * HSI2C Controller can operate in
+        * 1. High speed upto 3.4Mbps
+        * 2. Fast speed upto 1Mbps
+        */
+       int                     speed_mode;
+       int                     operation_mode;
+       int                     bus_id;
+       int                     scl_clk_stretch;
+       int                     stop_after_trans;
+       unsigned int            transfer_delay;
+
+       int                     idle_ip_index;
+};
+#endif /*__I2C_EXYNOS5_H */