--- /dev/null
+\r
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/string.h>
+\r
+#include "drxk_type.h"\r
+#include "mt2063.h"\r
+\r
+/* Version of this module */\r
+#define MT2063_VERSION 10018 /* Version 01.18 */\r
+\r
+static unsigned int verbose;
+module_param(verbose, int, 0644);\r
+\r
+//i2c operation\r
+static int mt2063_writeregs(struct mt2063_state *state, u8 reg1,\r
+ u8 *data, int len)
+{
+ int ret;
+ u8 buf[60];/* = { reg1, data };*/\r
+ \r
+ struct i2c_msg msg = {
+ .addr = state->config->tuner_address,\r
+ .flags = 0,
+ .buf = buf,
+ .len = len + 1
+ };
+
+ msg.buf[0] = reg1;
+ memcpy(msg.buf + 1, data, len);
+\r
+ //printk("mt2063_writeregs state->i2c=%p\n", state->i2c);\r
+ ret = i2c_transfer(state->i2c, &msg, 1);
+
+ if (ret < 0)\r
+ printk("mt2063_writeregs error ret=%d\n", ret);\r
+
+ return ret;\r
+}\r
+\r
+static int mt2063_read_regs(struct mt2063_state *state, u8 reg1, u8 *b, u8 len)\r
+{
+ int ret; \r
+ u8 b0[] = { reg1 };\r
+ struct i2c_msg msg[] = {
+ {
+ .addr = state->config->tuner_address,\r
+ .flags = I2C_M_RD,\r
+ .buf = b0,\r
+ .len = 1
+ }, {
+ .addr = state->config->tuner_address,\r
+ .flags = I2C_M_RD,
+ .buf = b,\r
+ .len = len\r
+ }
+ };
+\r
+ //printk("mt2063_read_regs state->i2c=%p\n", state->i2c);\r
+ ret = i2c_transfer(state->i2c, msg, 2);\r
+ if (ret < 0)\r
+ printk("mt2063_readregs error ret=%d\n", ret);\r
+
+ return ret;\r
+}\r
+\r
+\r
+\r
+\r
+//context of mt2063_userdef.c <Henry> ======================================\r
+//#################################################################\r
+//=================================================================\r
+/*****************************************************************************\r
+**\r
+** Name: MT_WriteSub\r
+**\r
+** Description: Write values to device using a two-wire serial bus.\r
+**\r
+** Parameters: hUserData - User-specific I/O parameter that was\r
+** passed to tuner's Open function.\r
+** addr - device serial bus address (value passed\r
+** as parameter to MTxxxx_Open)\r
+** subAddress - serial bus sub-address (Register Address)\r
+** pData - pointer to the Data to be written to the \r
+** device \r
+** cnt - number of bytes/registers to be written\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+** user-defined\r
+**\r
+** Notes: This is a callback function that is called from the\r
+** the tuning algorithm. You MUST provide code for this\r
+** function to write data using the tuner's 2-wire serial \r
+** bus.\r
+**\r
+** The hUserData parameter is a user-specific argument.\r
+** If additional arguments are needed for the user's\r
+** serial bus read/write functions, this argument can be\r
+** used to supply the necessary information.\r
+** The hUserData parameter is initialized in the tuner's Open\r
+** function.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** N/A 03-25-2004 DAD Original\r
+**\r
+*****************************************************************************/\r
+UData_t MT2063_WriteSub(Handle_t hUserData, \r
+ UData_t addr, \r
+ U8Data subAddress, \r
+ U8Data *pData, \r
+ UData_t cnt)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct dvb_frontend *fe = hUserData;\r
+ struct mt2063_state *state = fe->tuner_priv; \r
+ /*\r
+ ** ToDo: Add code here to implement a serial-bus write\r
+ ** operation to the MTxxxx tuner. If successful,\r
+ ** return MT_OK.\r
+ */\r
+/* return status; */\r
+\r
+//#if !TUNER_CONTROL_BY_DRXK_DRIVER \r
+ fe->ops.i2c_gate_ctrl(fe, 1); //I2C bypass drxk3926 close i2c bridge \r
+//#endif\r
+\r
+ if (mt2063_writeregs(state, subAddress,pData, cnt)<0)\r
+ {\r
+ status = MT2063_ERROR;\r
+ }\r
+ \r
+//#if !TUNER_CONTROL_BY_DRXK_DRIVER \r
+ fe->ops.i2c_gate_ctrl(fe, 0); //I2C bypass drxk3926 close i2c bridge \r
+//#endif\r
+\r
+ return (status);\r
+}\r
+\r
+/*****************************************************************************\r
+**\r
+** Name: MT_ReadSub\r
+**\r
+** Description: Read values from device using a two-wire serial bus.\r
+**\r
+** Parameters: hUserData - User-specific I/O parameter that was\r
+** passed to tuner's Open function.\r
+** addr - device serial bus address (value passed\r
+** as parameter to MTxxxx_Open)\r
+** subAddress - serial bus sub-address (Register Address)\r
+** pData - pointer to the Data to be written to the \r
+** device \r
+** cnt - number of bytes/registers to be written\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+** user-defined\r
+**\r
+** Notes: This is a callback function that is called from the\r
+** the tuning algorithm. You MUST provide code for this\r
+** function to read data using the tuner's 2-wire serial \r
+** bus.\r
+**\r
+** The hUserData parameter is a user-specific argument.\r
+** If additional arguments are needed for the user's\r
+** serial bus read/write functions, this argument can be\r
+** used to supply the necessary information.\r
+** The hUserData parameter is initialized in the tuner's Open\r
+** function.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** N/A 03-25-2004 DAD Original\r
+**\r
+*****************************************************************************/\r
+UData_t MT2063_ReadSub(Handle_t hUserData, \r
+ UData_t addr, \r
+ U8Data subAddress, \r
+ U8Data *pData, \r
+ UData_t cnt)\r
+{\r
+ /*\r
+ ** ToDo: Add code here to implement a serial-bus read\r
+ ** operation to the MTxxxx tuner. If successful,\r
+ ** return MT_OK.\r
+ */\r
+/* return status; */\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct dvb_frontend *fe = hUserData;\r
+ struct mt2063_state *state = fe->tuner_priv; \r
+ UData_t i = 0;\r
+//#if !TUNER_CONTROL_BY_DRXK_DRIVER \r
+ fe->ops.i2c_gate_ctrl(fe, 1); //I2C bypass drxk3926 close i2c bridge \r
+//#endif\r
+ \r
+ for (i = 0; i < cnt; i++)\r
+ { \r
+ if (mt2063_read_regs(state, subAddress+i, pData+i, 1)<0)\r
+ {\r
+ status = MT2063_ERROR;\r
+ break;\r
+ }\r
+ }\r
+\r
+//#if !TUNER_CONTROL_BY_DRXK_DRIVER\r
+ fe->ops.i2c_gate_ctrl(fe, 0); //I2C bypass drxk3926 close i2c bridge\r
+//#endif\r
+\r
+ return(status);\r
+}\r
+\r
+\r
+/*****************************************************************************\r
+**\r
+** Name: MT_Sleep\r
+**\r
+** Description: Delay execution for "nMinDelayTime" milliseconds\r
+**\r
+** Parameters: hUserData - User-specific I/O parameter that was\r
+** passed to tuner's Open function.\r
+** nMinDelayTime - Delay time in milliseconds\r
+**\r
+** Returns: None.\r
+**\r
+** Notes: This is a callback function that is called from the\r
+** the tuning algorithm. You MUST provide code that\r
+** blocks execution for the specified period of time. \r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** N/A 03-25-2004 DAD Original\r
+**\r
+*****************************************************************************/\r
+void MT2063_Sleep(Handle_t hUserData, \r
+ UData_t nMinDelayTime)\r
+{\r
+ /*\r
+ ** ToDo: Add code here to implement a OS blocking\r
+ ** for a period of "nMinDelayTime" milliseconds.\r
+ */\r
+ msleep(nMinDelayTime);\r
+}\r
+\r
+\r
+#if defined(MT2060_CNT)\r
+#if MT2060_CNT > 0\r
+/*****************************************************************************\r
+**\r
+** Name: MT_TunerGain (MT2060 only)\r
+**\r
+** Description: Measure the relative tuner gain using the demodulator\r
+**\r
+** Parameters: hUserData - User-specific I/O parameter that was\r
+** passed to tuner's Open function.\r
+** pMeas - Tuner gain (1/100 of dB scale).\r
+** ie. 1234 = 12.34 (dB)\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** user-defined errors could be set\r
+**\r
+** Notes: This is a callback function that is called from the\r
+** the 1st IF location routine. You MUST provide\r
+** code that measures the relative tuner gain in a dB\r
+** (not linear) scale. The return value is an integer\r
+** value scaled to 1/100 of a dB.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** N/A 06-16-2004 DAD Original\r
+** N/A 11-30-2004 DAD Renamed from MT_DemodInputPower. This name\r
+** better describes what this function does.\r
+**\r
+*****************************************************************************/\r
+UData_t MT2060_TunerGain(Handle_t hUserData,\r
+ SData_t* pMeas)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+\r
+ /*\r
+ ** ToDo: Add code here to return the gain / power level measured\r
+ ** at the input to the demodulator.\r
+ */\r
+\r
+\r
+\r
+ return (status);\r
+}\r
+#endif\r
+#endif\r
+//end of mt2063_userdef.c\r
+//=================================================================\r
+//#################################################################\r
+//=================================================================\r
+\r
+\r
+//context of mt2063_spuravoid.c <Henry> ======================================\r
+//#################################################################\r
+//=================================================================\r
+\r
+/*****************************************************************************\r
+**\r
+** Name: mt_spuravoid.c\r
+**\r
+** Description: Microtune spur avoidance software module.\r
+** Supports Microtune tuner drivers.\r
+**\r
+** CVS ID: $Id: mt_spuravoid.c,v 1.3 2008/06/26 15:39:52 software Exp $\r
+** CVS Source: $Source: /export/home/cvsroot/software/tuners/MT2063/mt_spuravoid.c,v $\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 082 03-25-2005 JWS Original multi-tuner support - requires\r
+** MTxxxx_CNT declarations\r
+** 096 04-06-2005 DAD Ver 1.11: Fix divide by 0 error if maxH==0.\r
+** 094 04-06-2005 JWS Ver 1.11 Added uceil and ufloor to get rid\r
+** of compiler warnings\r
+** N/A 04-07-2005 DAD Ver 1.13: Merged single- and multi-tuner spur\r
+** avoidance into a single module.\r
+** 103 01-31-2005 DAD Ver 1.14: In MT_AddExclZone(), if the range\r
+** (f_min, f_max) < 0, ignore the entry.\r
+** 115 03-23-2007 DAD Fix declaration of spur due to truncation\r
+** errors.\r
+** 117 03-29-2007 RSK Ver 1.15: Re-wrote to match search order from\r
+** tuner DLL.\r
+** 137 06-18-2007 DAD Ver 1.16: Fix possible divide-by-0 error for\r
+** multi-tuners that have\r
+** (delta IF1) > (f_out-f_outbw/2).\r
+** 147 07-27-2007 RSK Ver 1.17: Corrected calculation (-) to (+)\r
+** Added logic to force f_Center within 1/2 f_Step.\r
+** 177 S 02-26-2008 RSK Ver 1.18: Corrected calculation using LO1 > MAX/2\r
+** Type casts added to preserve correct sign.\r
+** N/A I 06-17-2008 RSK Ver 1.19: Refactoring avoidance of DECT\r
+** frequencies into MT_ResetExclZones().\r
+** N/A I 06-20-2008 RSK Ver 1.21: New VERSION number for ver checking.\r
+**\r
+*****************************************************************************/\r
+\r
+#if !defined(MT2063_TUNER_CNT)\r
+#error MT2063_TUNER_CNT is not defined (see mt_userdef.h)\r
+#endif\r
+\r
+#if MT2063_TUNER_CNT == 0\r
+#error MT2063_TUNER_CNT must be updated in mt_userdef.h\r
+#endif\r
+\r
+/* Version of this module */\r
+#define MT2063_SPUR_VERSION 10201 /* Version 01.21 */\r
+\r
+\r
+/* Implement ceiling, floor functions. */\r
+#define ceil(n, d) (((n) < 0) ? (-((-(n))/(d))) : (n)/(d) + ((n)%(d) != 0))\r
+#define uceil(n, d) ((n)/(d) + ((n)%(d) != 0))\r
+#define floor(n, d) (((n) < 0) ? (-((-(n))/(d))) - ((n)%(d) != 0) : (n)/(d))\r
+#define ufloor(n, d) ((n)/(d))\r
+\r
+\r
+struct MT2063_FIFZone_t\r
+{\r
+ SData_t min_;\r
+ SData_t max_;\r
+};\r
+\r
+#if MT2063_TUNER_CNT > 1\r
+static struct MT2063_AvoidSpursData_t* TunerList[MT2063_TUNER_CNT];\r
+static UData_t TunerCount = 0;\r
+#endif\r
+\r
+UData_t MT2063_RegisterTuner(struct MT2063_AvoidSpursData_t* pAS_Info)\r
+{\r
+#if MT2063_TUNER_CNT == 1\r
+ pAS_Info->nAS_Algorithm = 1;\r
+ return MT2063_OK;\r
+#else\r
+ UData_t index;\r
+\r
+ pAS_Info->nAS_Algorithm = 2;\r
+\r
+ /*\r
+ ** Check to see if tuner is already registered\r
+ */\r
+ for (index = 0; index < TunerCount; index++)\r
+ {\r
+ if (TunerList[index] == pAS_Info)\r
+ {\r
+ return MT2063_OK; /* Already here - no problem */\r
+ }\r
+ }\r
+\r
+ /*\r
+ ** Add tuner to list - if there is room.\r
+ */\r
+ if (TunerCount < MT2063_TUNER_CNT)\r
+ {\r
+ TunerList[TunerCount] = pAS_Info;\r
+ TunerCount++;\r
+ return MT2063_OK;\r
+ }\r
+ else\r
+ return MT2063_TUNER_CNT_ERR;\r
+#endif\r
+}\r
+\r
+\r
+void MT2063_UnRegisterTuner(struct MT2063_AvoidSpursData_t* pAS_Info)\r
+{\r
+#if MT2063_TUNER_CNT == 1\r
+ pAS_Info;\r
+#else\r
+\r
+ UData_t index;\r
+\r
+ for (index = 0; index < TunerCount; index++)\r
+ {\r
+ if (TunerList[index] == pAS_Info)\r
+ {\r
+ TunerList[index] = TunerList[--TunerCount];\r
+ }\r
+ }\r
+#endif\r
+}\r
+\r
+\r
+/*\r
+** Reset all exclusion zones.\r
+** Add zones to protect the PLL FracN regions near zero\r
+**\r
+** N/A I 06-17-2008 RSK Ver 1.19: Refactoring avoidance of DECT\r
+** frequencies into MT_ResetExclZones().\r
+*/\r
+void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t* pAS_Info)\r
+{\r
+ UData_t center;\r
+#if MT2063_TUNER_CNT > 1\r
+ UData_t index;\r
+ struct MT2063_AvoidSpursData_t* adj;\r
+#endif\r
+\r
+ pAS_Info->nZones = 0; /* this clears the used list */\r
+ pAS_Info->usedZones = NULL; /* reset ptr */\r
+ pAS_Info->freeZones = NULL; /* reset ptr */\r
+\r
+ center = pAS_Info->f_ref * ((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw/2 + pAS_Info->f_in) / pAS_Info->f_ref) - pAS_Info->f_in;\r
+ while (center < pAS_Info->f_if1_Center + pAS_Info->f_if1_bw/2 + pAS_Info->f_LO1_FracN_Avoid)\r
+ {\r
+ /* Exclude LO1 FracN */\r
+ MT2063_AddExclZone(pAS_Info, center-pAS_Info->f_LO1_FracN_Avoid, center-1);\r
+ MT2063_AddExclZone(pAS_Info, center+1, center+pAS_Info->f_LO1_FracN_Avoid);\r
+ center += pAS_Info->f_ref;\r
+ }\r
+\r
+ center = pAS_Info->f_ref * ((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw/2 - pAS_Info->f_out) / pAS_Info->f_ref) + pAS_Info->f_out;\r
+ while (center < pAS_Info->f_if1_Center + pAS_Info->f_if1_bw/2 + pAS_Info->f_LO2_FracN_Avoid)\r
+ {\r
+ /* Exclude LO2 FracN */\r
+ MT2063_AddExclZone(pAS_Info, center-pAS_Info->f_LO2_FracN_Avoid, center-1);\r
+ MT2063_AddExclZone(pAS_Info, center+1, center+pAS_Info->f_LO2_FracN_Avoid);\r
+ center += pAS_Info->f_ref;\r
+ }\r
+\r
+ if( MT2063_EXCLUDE_US_DECT_FREQUENCIES(pAS_Info->avoidDECT) )\r
+ {\r
+ /* Exclude LO1 values that conflict with DECT channels */\r
+ MT2063_AddExclZone(pAS_Info, 1920836000 - pAS_Info->f_in, 1922236000 - pAS_Info->f_in); /* Ctr = 1921.536 */\r
+ MT2063_AddExclZone(pAS_Info, 1922564000 - pAS_Info->f_in, 1923964000 - pAS_Info->f_in); /* Ctr = 1923.264 */\r
+ MT2063_AddExclZone(pAS_Info, 1924292000 - pAS_Info->f_in, 1925692000 - pAS_Info->f_in); /* Ctr = 1924.992 */\r
+ MT2063_AddExclZone(pAS_Info, 1926020000 - pAS_Info->f_in, 1927420000 - pAS_Info->f_in); /* Ctr = 1926.720 */\r
+ MT2063_AddExclZone(pAS_Info, 1927748000 - pAS_Info->f_in, 1929148000 - pAS_Info->f_in); /* Ctr = 1928.448 */\r
+ }\r
+\r
+ if( MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(pAS_Info->avoidDECT) )\r
+ {\r
+ MT2063_AddExclZone(pAS_Info, 1896644000 - pAS_Info->f_in, 1898044000 - pAS_Info->f_in); /* Ctr = 1897.344 */\r
+ MT2063_AddExclZone(pAS_Info, 1894916000 - pAS_Info->f_in, 1896316000 - pAS_Info->f_in); /* Ctr = 1895.616 */\r
+ MT2063_AddExclZone(pAS_Info, 1893188000 - pAS_Info->f_in, 1894588000 - pAS_Info->f_in); /* Ctr = 1893.888 */\r
+ MT2063_AddExclZone(pAS_Info, 1891460000 - pAS_Info->f_in, 1892860000 - pAS_Info->f_in); /* Ctr = 1892.16 */\r
+ MT2063_AddExclZone(pAS_Info, 1889732000 - pAS_Info->f_in, 1891132000 - pAS_Info->f_in); /* Ctr = 1890.432 */\r
+ MT2063_AddExclZone(pAS_Info, 1888004000 - pAS_Info->f_in, 1889404000 - pAS_Info->f_in); /* Ctr = 1888.704 */\r
+ MT2063_AddExclZone(pAS_Info, 1886276000 - pAS_Info->f_in, 1887676000 - pAS_Info->f_in); /* Ctr = 1886.976 */\r
+ MT2063_AddExclZone(pAS_Info, 1884548000 - pAS_Info->f_in, 1885948000 - pAS_Info->f_in); /* Ctr = 1885.248 */\r
+ MT2063_AddExclZone(pAS_Info, 1882820000 - pAS_Info->f_in, 1884220000 - pAS_Info->f_in); /* Ctr = 1883.52 */\r
+ MT2063_AddExclZone(pAS_Info, 1881092000 - pAS_Info->f_in, 1882492000 - pAS_Info->f_in); /* Ctr = 1881.792 */\r
+ }\r
+\r
+#if MT2063_TUNER_CNT > 1\r
+ /*\r
+ ** Iterate through all adjacent tuners and exclude frequencies related to them\r
+ */\r
+ for (index = 0; index < TunerCount; ++index)\r
+ {\r
+ adj = TunerList[index];\r
+ if (pAS_Info == adj) /* skip over our own data, don't process it */\r
+ continue;\r
+\r
+ /*\r
+ ** Add 1st IF exclusion zone covering adjacent tuner's LO2\r
+ ** at "adjfLO2 + f_out" +/- m_MinLOSpacing\r
+ */\r
+ if (adj->f_LO2 != 0)\r
+ MT2063_AddExclZone(pAS_Info,\r
+ (adj->f_LO2 + pAS_Info->f_out) - pAS_Info->f_min_LO_Separation,\r
+ (adj->f_LO2 + pAS_Info->f_out) + pAS_Info->f_min_LO_Separation );\r
+\r
+ /*\r
+ ** Add 1st IF exclusion zone covering adjacent tuner's LO1\r
+ ** at "adjfLO1 - f_in" +/- m_MinLOSpacing\r
+ */\r
+ if (adj->f_LO1 != 0)\r
+ MT2063_AddExclZone(pAS_Info,\r
+ (adj->f_LO1 - pAS_Info->f_in) - pAS_Info->f_min_LO_Separation,\r
+ (adj->f_LO1 - pAS_Info->f_in) + pAS_Info->f_min_LO_Separation );\r
+ }\r
+#endif\r
+}\r
+\r
+\r
+static struct MT2063_ExclZone_t* InsertNode(struct MT2063_AvoidSpursData_t* pAS_Info,\r
+ struct MT2063_ExclZone_t* pPrevNode)\r
+{\r
+ struct MT2063_ExclZone_t* pNode;\r
+ /* Check for a node in the free list */\r
+ if (pAS_Info->freeZones != NULL)\r
+ {\r
+ /* Use one from the free list */\r
+ pNode = pAS_Info->freeZones;\r
+ pAS_Info->freeZones = pNode->next_;\r
+ }\r
+ else\r
+ {\r
+ /* Grab a node from the array */\r
+ pNode = &pAS_Info->MT2063_ExclZones[pAS_Info->nZones];\r
+ }\r
+\r
+ if (pPrevNode != NULL)\r
+ {\r
+ pNode->next_ = pPrevNode->next_;\r
+ pPrevNode->next_ = pNode;\r
+ }\r
+ else /* insert at the beginning of the list */\r
+ {\r
+ pNode->next_ = pAS_Info->usedZones;\r
+ pAS_Info->usedZones = pNode;\r
+ }\r
+\r
+ pAS_Info->nZones++;\r
+ return pNode;\r
+}\r
+\r
+\r
+static struct MT2063_ExclZone_t* RemoveNode(struct MT2063_AvoidSpursData_t* pAS_Info,\r
+ struct MT2063_ExclZone_t* pPrevNode,\r
+ struct MT2063_ExclZone_t* pNodeToRemove)\r
+{\r
+ struct MT2063_ExclZone_t* pNext = pNodeToRemove->next_;\r
+\r
+ /* Make previous node point to the subsequent node */\r
+ if (pPrevNode != NULL)\r
+ pPrevNode->next_ = pNext;\r
+\r
+ /* Add pNodeToRemove to the beginning of the freeZones */\r
+ pNodeToRemove->next_ = pAS_Info->freeZones;\r
+ pAS_Info->freeZones = pNodeToRemove;\r
+\r
+ /* Decrement node count */\r
+ pAS_Info->nZones--;\r
+\r
+ return pNext;\r
+}\r
+\r
+\r
+/*****************************************************************************\r
+**\r
+** Name: MT_AddExclZone\r
+**\r
+** Description: Add (and merge) an exclusion zone into the list.\r
+** If the range (f_min, f_max) is totally outside the\r
+** 1st IF BW, ignore the entry.\r
+** If the range (f_min, f_max) is negative, ignore the entry.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 103 01-31-2005 DAD Ver 1.14: In MT_AddExclZone(), if the range\r
+** (f_min, f_max) < 0, ignore the entry.\r
+**\r
+*****************************************************************************/\r
+void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t* pAS_Info,\r
+ UData_t f_min,\r
+ UData_t f_max)\r
+{\r
+ struct MT2063_ExclZone_t* pNode = pAS_Info->usedZones;\r
+ struct MT2063_ExclZone_t* pPrev = NULL;\r
+ struct MT2063_ExclZone_t* pNext = NULL;\r
+ \r
+ /* Check to see if this overlaps the 1st IF filter */\r
+ if ((f_max > (pAS_Info->f_if1_Center - (pAS_Info->f_if1_bw / 2)))\r
+ && (f_min < (pAS_Info->f_if1_Center + (pAS_Info->f_if1_bw / 2)))\r
+ && (f_min < f_max))\r
+ {\r
+ /*\r
+ ** 1 2 3 4 5 6\r
+ **\r
+ ** New entry: |---| |--| |--| |-| |---| |--|\r
+ ** or or or or or\r
+ ** Existing: |--| |--| |--| |---| |-| |--|\r
+ */\r
+ \r
+ /* Check for our place in the list */\r
+ while ((pNode != NULL) && (pNode->max_ < f_min))\r
+ {\r
+ pPrev = pNode;\r
+ pNode = pNode->next_;\r
+ }\r
+\r
+ if ((pNode != NULL) && (pNode->min_ < f_max))\r
+ {\r
+ /* Combine me with pNode */\r
+ if (f_min < pNode->min_)\r
+ pNode->min_ = f_min;\r
+ if (f_max > pNode->max_)\r
+ pNode->max_ = f_max;\r
+ }\r
+ else\r
+ {\r
+ pNode = InsertNode(pAS_Info, pPrev);\r
+ pNode->min_ = f_min;\r
+ pNode->max_ = f_max;\r
+ }\r
+\r
+ /* Look for merging possibilities */\r
+ pNext = pNode->next_;\r
+ while ((pNext != NULL) && (pNext->min_ < pNode->max_))\r
+ {\r
+ if (pNext->max_ > pNode->max_)\r
+ pNode->max_ = pNext->max_;\r
+ pNext = RemoveNode(pAS_Info, pNode, pNext); /* Remove pNext, return ptr to pNext->next */\r
+ }\r
+ }\r
+}\r
+\r
+\r
+/*****************************************************************************\r
+**\r
+** Name: MT_ChooseFirstIF\r
+**\r
+** Description: Choose the best available 1st IF\r
+** If f_Desired is not excluded, choose that first.\r
+** Otherwise, return the value closest to f_Center that is\r
+** not excluded\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 117 03-29-2007 RSK Ver 1.15: Re-wrote to match search order from\r
+** tuner DLL.\r
+** 147 07-27-2007 RSK Ver 1.17: Corrected calculation (-) to (+)\r
+** Added logic to force f_Center within 1/2 f_Step.\r
+**\r
+*****************************************************************************/\r
+UData_t MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t* pAS_Info)\r
+{\r
+ /*\r
+ ** Update "f_Desired" to be the nearest "combinational-multiple" of "f_LO1_Step".\r
+ ** The resulting number, F_LO1 must be a multiple of f_LO1_Step. And F_LO1 is the arithmetic sum\r
+ ** of f_in + f_Center. Neither f_in, nor f_Center must be a multiple of f_LO1_Step.\r
+ ** However, the sum must be.\r
+ */\r
+ const UData_t f_Desired = pAS_Info->f_LO1_Step * ((pAS_Info->f_if1_Request + pAS_Info->f_in + pAS_Info->f_LO1_Step/2) / pAS_Info->f_LO1_Step) - pAS_Info->f_in;\r
+ const UData_t f_Step = (pAS_Info->f_LO1_Step > pAS_Info->f_LO2_Step) ? pAS_Info->f_LO1_Step : pAS_Info->f_LO2_Step;\r
+ UData_t f_Center;\r
+\r
+ SData_t i;\r
+ SData_t j = 0;\r
+ UData_t bDesiredExcluded = 0;\r
+ UData_t bZeroExcluded = 0;\r
+ SData_t tmpMin, tmpMax;\r
+ SData_t bestDiff;\r
+ struct MT2063_ExclZone_t* pNode = pAS_Info->usedZones;\r
+ struct MT2063_FIFZone_t zones[MT2063_MAX_ZONES];\r
+\r
+ if (pAS_Info->nZones == 0)\r
+ return f_Desired;\r
+\r
+ /* f_Center needs to be an integer multiple of f_Step away from f_Desired */\r
+ if (pAS_Info->f_if1_Center > f_Desired)\r
+ f_Center = f_Desired + f_Step * ((pAS_Info->f_if1_Center - f_Desired + f_Step/2) / f_Step);\r
+ else\r
+ f_Center = f_Desired - f_Step * ((f_Desired - pAS_Info->f_if1_Center + f_Step/2) / f_Step);\r
+\r
+ //assert;\r
+ //if (!abs((SData_t) f_Center - (SData_t) pAS_Info->f_if1_Center) <= (SData_t) (f_Step/2))\r
+ // return 0;\r
+\r
+ /* Take MT_ExclZones, center around f_Center and change the resolution to f_Step */\r
+ while (pNode != NULL)\r
+ {\r
+ /* floor function */\r
+ tmpMin = floor((SData_t) (pNode->min_ - f_Center), (SData_t) f_Step);\r
+\r
+ /* ceil function */\r
+ tmpMax = ceil((SData_t) (pNode->max_ - f_Center), (SData_t) f_Step);\r
+\r
+ if ((pNode->min_ < f_Desired) && (pNode->max_ > f_Desired))\r
+ bDesiredExcluded = 1;\r
+\r
+ if ((tmpMin < 0) && (tmpMax > 0))\r
+ bZeroExcluded = 1;\r
+\r
+ /* See if this zone overlaps the previous */\r
+ if ((j>0) && (tmpMin < zones[j-1].max_))\r
+ zones[j-1].max_ = tmpMax;\r
+ else\r
+ {\r
+ /* Add new zone */\r
+ //assert(j<MT2063_MAX_ZONES);\r
+ //if (j>=MT2063_MAX_ZONES)\r
+ //break;\r
+ \r
+ zones[j].min_ = tmpMin;\r
+ zones[j].max_ = tmpMax;\r
+ j++;\r
+ }\r
+ pNode = pNode->next_;\r
+ }\r
+\r
+ /*\r
+ ** If the desired is okay, return with it\r
+ */\r
+ if (bDesiredExcluded == 0)\r
+ return f_Desired;\r
+\r
+ /*\r
+ ** If the desired is excluded and the center is okay, return with it\r
+ */\r
+ if (bZeroExcluded == 0)\r
+ return f_Center;\r
+\r
+ /* Find the value closest to 0 (f_Center) */\r
+ bestDiff = zones[0].min_;\r
+ for (i=0; i<j; i++)\r
+ {\r
+ if (abs(zones[i].min_) < abs(bestDiff)) bestDiff = zones[i].min_;\r
+ if (abs(zones[i].max_) < abs(bestDiff)) bestDiff = zones[i].max_;\r
+ }\r
+\r
+\r
+ if (bestDiff < 0)\r
+ return f_Center - ((UData_t) (-bestDiff) * f_Step);\r
+\r
+ return f_Center + (bestDiff * f_Step);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: gcd\r
+**\r
+** Description: Uses Euclid's algorithm\r
+**\r
+** Parameters: u, v - unsigned values whose GCD is desired.\r
+**\r
+** Global: None\r
+**\r
+** Returns: greatest common divisor of u and v, if either value\r
+** is 0, the other value is returned as the result.\r
+**\r
+** Dependencies: None.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** N/A 06-01-2004 JWS Original\r
+** N/A 08-03-2004 DAD Changed to Euclid's since it can handle\r
+** unsigned numbers.\r
+**\r
+****************************************************************************/\r
+static UData_t MT2063_gcd(UData_t u, UData_t v)\r
+{\r
+ UData_t r;\r
+\r
+ while (v != 0)\r
+ {\r
+ r = u % v;\r
+ u = v;\r
+ v = r;\r
+ }\r
+\r
+ return u;\r
+}\r
+\r
+/****************************************************************************\r
+**\r
+** Name: umax\r
+**\r
+** Description: Implements a simple maximum function for unsigned numbers.\r
+** Implemented as a function rather than a macro to avoid\r
+** multiple evaluation of the calling parameters.\r
+**\r
+** Parameters: a, b - Values to be compared\r
+**\r
+** Global: None\r
+**\r
+** Returns: larger of the input values.\r
+**\r
+** Dependencies: None.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** N/A 06-02-2004 JWS Original\r
+**\r
+****************************************************************************/\r
+static UData_t MT2063_umax(UData_t a, UData_t b)\r
+{\r
+ return (a >= b) ? a : b;\r
+}\r
+\r
+#if MT2063_TUNER_CNT > 1\r
+static SData_t RoundAwayFromZero(SData_t n, SData_t d)\r
+{\r
+ return (n<0) ? floor(n, d) : ceil(n, d);\r
+}\r
+\r
+/****************************************************************************\r
+**\r
+** Name: IsSpurInAdjTunerBand\r
+**\r
+** Description: Checks to see if a spur will be present within the IF's\r
+** bandwidth or near the zero IF.\r
+** (fIFOut +/- fIFBW/2, -fIFOut +/- fIFBW/2)\r
+** and\r
+** (0 +/- fZIFBW/2)\r
+**\r
+** ma mb me mf mc md\r
+** <--+-+-+-----------------+-+-+-----------------+-+-+-->\r
+** | ^ 0 ^ |\r
+** ^ b=-fIFOut+fIFBW/2 -b=+fIFOut-fIFBW/2 ^\r
+** a=-fIFOut-fIFBW/2 -a=+fIFOut+fIFBW/2\r
+**\r
+** Note that some equations are doubled to prevent round-off\r
+** problems when calculating fIFBW/2\r
+**\r
+** The spur frequencies are computed as:\r
+**\r
+** fSpur = n * f1 - m * f2 - fOffset\r
+**\r
+** Parameters: f1 - The 1st local oscillator (LO) frequency\r
+** of the tuner whose output we are examining\r
+** f2 - The 1st local oscillator (LO) frequency\r
+** of the adjacent tuner\r
+** fOffset - The 2nd local oscillator of the tuner whose\r
+** output we are examining\r
+** fIFOut - Output IF center frequency\r
+** fIFBW - Output IF Bandwidth\r
+** nMaxH - max # of LO harmonics to search\r
+** fp - If spur, positive distance to spur-free band edge (returned)\r
+** fm - If spur, negative distance to spur-free band edge (returned)\r
+**\r
+** Returns: 1 if an LO spur would be present, otherwise 0.\r
+**\r
+** Dependencies: None.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** N/A 01-21-2005 JWS Original, adapted from MT_DoubleConversion.\r
+** 115 03-23-2007 DAD Fix declaration of spur due to truncation\r
+** errors.\r
+** 137 06-18-2007 DAD Ver 1.16: Fix possible divide-by-0 error for\r
+** multi-tuners that have\r
+** (delta IF1) > (f_out-f_outbw/2).\r
+** 177 S 02-26-2008 RSK Ver 1.18: Corrected calculation using LO1 > MAX/2\r
+** Type casts added to preserve correct sign.\r
+**\r
+****************************************************************************/\r
+static UData_t IsSpurInAdjTunerBand(UData_t bIsMyOutput,\r
+ UData_t f1,\r
+ UData_t f2,\r
+ UData_t fOffset,\r
+ UData_t fIFOut,\r
+ UData_t fIFBW,\r
+ UData_t fZIFBW,\r
+ UData_t nMaxH,\r
+ UData_t *fp,\r
+ UData_t *fm)\r
+{\r
+ UData_t bSpurFound = 0;\r
+\r
+ const UData_t fHalf_IFBW = fIFBW / 2;\r
+ const UData_t fHalf_ZIFBW = fZIFBW / 2;\r
+\r
+ /* Calculate a scale factor for all frequencies, so that our\r
+ calculations all stay within 31 bits */\r
+ const UData_t f_Scale = ((f1 + (fOffset + fIFOut + fHalf_IFBW) / nMaxH) / (MAX_UDATA/2 / nMaxH)) + 1;\r
+\r
+ /*\r
+ ** After this scaling, _f1, _f2, and _f3 are guaranteed to fit into\r
+ ** signed data types (smaller than MAX_UDATA/2)\r
+ */\r
+ const SData_t _f1 = (SData_t) ( f1 / f_Scale);\r
+ const SData_t _f2 = (SData_t) ( f2 / f_Scale);\r
+ const SData_t _f3 = (SData_t) (fOffset / f_Scale);\r
+\r
+ const SData_t c = (SData_t) (fIFOut - fHalf_IFBW) / (SData_t) f_Scale;\r
+ const SData_t d = (SData_t) ((fIFOut + fHalf_IFBW) / f_Scale);\r
+ const SData_t f = (SData_t) (fHalf_ZIFBW / f_Scale);\r
+\r
+ SData_t ma, mb, mc, md, me, mf;\r
+\r
+ SData_t fp_ = 0;\r
+ SData_t fm_ = 0;\r
+ SData_t n;\r
+\r
+\r
+ /*\r
+ ** If the other tuner does not have an LO frequency defined,\r
+ ** assume that we cannot interfere with it\r
+ */\r
+ if (f2 == 0)\r
+ return 0;\r
+\r
+\r
+ /* Check out all multiples of f1 from -nMaxH to +nMaxH */\r
+ for (n = -(SData_t)nMaxH; n <= (SData_t)nMaxH; ++n)\r
+ {\r
+ const SData_t nf1 = n*_f1;\r
+ md = (_f3 + d - nf1) / _f2;\r
+\r
+ /* If # f2 harmonics > nMaxH, then no spurs present */\r
+ if (md <= -(SData_t) nMaxH )\r
+ break;\r
+\r
+ ma = (_f3 - d - nf1) / _f2;\r
+ if ((ma == md) || (ma >= (SData_t) (nMaxH)))\r
+ continue;\r
+\r
+ mc = (_f3 + c - nf1) / _f2;\r
+ if (mc != md)\r
+ {\r
+ const SData_t m = (n<0) ? md : mc;\r
+ const SData_t fspur = (nf1 + m*_f2 - _f3);\r
+ const SData_t den = (bIsMyOutput ? n - 1 : n);\r
+ if (den == 0)\r
+ {\r
+ fp_ = (d - fspur)* f_Scale;\r
+ fm_ = (fspur - c)* f_Scale;\r
+ }\r
+ else\r
+ {\r
+ fp_ = (SData_t) RoundAwayFromZero((d - fspur)* f_Scale, den);\r
+ fm_ = (SData_t) RoundAwayFromZero((fspur - c)* f_Scale, den);\r
+ }\r
+ if (((UData_t)abs(fm_) >= f_Scale) && ((UData_t)abs(fp_) >= f_Scale))\r
+ {\r
+ bSpurFound = 1;\r
+ break;\r
+ }\r
+ }\r
+\r
+ /* Location of Zero-IF-spur to be checked */\r
+ mf = (_f3 + f - nf1) / _f2;\r
+ me = (_f3 - f - nf1) / _f2;\r
+ if (me != mf)\r
+ {\r
+ const SData_t m = (n<0) ? mf : me;\r
+ const SData_t fspur = (nf1 + m*_f2 - _f3);\r
+ const SData_t den = (bIsMyOutput ? n - 1 : n);\r
+ if (den == 0)\r
+ {\r
+ fp_ = (d - fspur)* f_Scale;\r
+ fm_ = (fspur - c)* f_Scale;\r
+ }\r
+ else\r
+ {\r
+ fp_ = (SData_t) RoundAwayFromZero((f - fspur)* f_Scale, den);\r
+ fm_ = (SData_t) RoundAwayFromZero((fspur + f)* f_Scale, den);\r
+ }\r
+ if (((UData_t)abs(fm_) >= f_Scale) && ((UData_t)abs(fp_) >= f_Scale))\r
+ {\r
+ bSpurFound = 1;\r
+ break;\r
+ }\r
+ }\r
+\r
+ mb = (_f3 - c - nf1) / _f2;\r
+ if (ma != mb)\r
+ {\r
+ const SData_t m = (n<0) ? mb : ma;\r
+ const SData_t fspur = (nf1 + m*_f2 - _f3);\r
+ const SData_t den = (bIsMyOutput ? n - 1 : n);\r
+ if (den == 0)\r
+ {\r
+ fp_ = (d - fspur)* f_Scale;\r
+ fm_ = (fspur - c)* f_Scale;\r
+ }\r
+ else\r
+ {\r
+ fp_ = (SData_t) RoundAwayFromZero((-c - fspur)* f_Scale, den);\r
+ fm_ = (SData_t) RoundAwayFromZero((fspur +d)* f_Scale, den);\r
+ }\r
+ if (((UData_t)abs(fm_) >= f_Scale) && ((UData_t)abs(fp_) >= f_Scale))\r
+ {\r
+ bSpurFound = 1;\r
+ break;\r
+ }\r
+ }\r
+ }\r
+\r
+ /*\r
+ ** Verify that fm & fp are both positive\r
+ ** Add one to ensure next 1st IF choice is not right on the edge\r
+ */\r
+ if (fp_ < 0)\r
+ {\r
+ *fp = -fm_ + 1;\r
+ *fm = -fp_ + 1;\r
+ }\r
+ else if (fp_ > 0)\r
+ {\r
+ *fp = fp_ + 1;\r
+ *fm = fm_ + 1;\r
+ }\r
+ else\r
+ {\r
+ *fp = 1;\r
+ *fm = abs(fm_) + 1;\r
+ }\r
+\r
+ return bSpurFound;\r
+}\r
+#endif\r
+\r
+/****************************************************************************\r
+**\r
+** Name: IsSpurInBand\r
+**\r
+** Description: Checks to see if a spur will be present within the IF's\r
+** bandwidth. (fIFOut +/- fIFBW, -fIFOut +/- fIFBW)\r
+**\r
+** ma mb mc md\r
+** <--+-+-+-------------------+-------------------+-+-+-->\r
+** | ^ 0 ^ |\r
+** ^ b=-fIFOut+fIFBW/2 -b=+fIFOut-fIFBW/2 ^\r
+** a=-fIFOut-fIFBW/2 -a=+fIFOut+fIFBW/2\r
+**\r
+** Note that some equations are doubled to prevent round-off\r
+** problems when calculating fIFBW/2\r
+**\r
+** Parameters: pAS_Info - Avoid Spurs information block\r
+** fm - If spur, amount f_IF1 has to move negative\r
+** fp - If spur, amount f_IF1 has to move positive\r
+**\r
+** Global: None\r
+**\r
+** Returns: 1 if an LO spur would be present, otherwise 0.\r
+**\r
+** Dependencies: None.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** N/A 11-28-2002 DAD Implemented algorithm from applied patent\r
+**\r
+****************************************************************************/\r
+static UData_t IsSpurInBand(struct MT2063_AvoidSpursData_t* pAS_Info,\r
+ UData_t* fm,\r
+ UData_t* fp)\r
+{\r
+ /*\r
+ ** Calculate LO frequency settings.\r
+ */\r
+ UData_t n, n0;\r
+ const UData_t f_LO1 = pAS_Info->f_LO1;\r
+ const UData_t f_LO2 = pAS_Info->f_LO2;\r
+ const UData_t d = pAS_Info->f_out + pAS_Info->f_out_bw/2;\r
+ const UData_t c = d - pAS_Info->f_out_bw;\r
+ const UData_t f = pAS_Info->f_zif_bw/2;\r
+ const UData_t f_Scale = (f_LO1 / (MAX_UDATA/2 / pAS_Info->maxH1)) + 1;\r
+ SData_t f_nsLO1, f_nsLO2;\r
+ SData_t f_Spur;\r
+ UData_t ma, mb, mc, md, me, mf;\r
+ UData_t lo_gcd, gd_Scale, gc_Scale, gf_Scale, hgds, hgfs, hgcs;\r
+#if MT2063_TUNER_CNT > 1\r
+ UData_t index;\r
+\r
+ struct MT2063_AvoidSpursData_t *adj;\r
+#endif\r
+ *fm = 0;\r
+\r
+ /*\r
+ ** For each edge (d, c & f), calculate a scale, based on the gcd\r
+ ** of f_LO1, f_LO2 and the edge value. Use the larger of this\r
+ ** gcd-based scale factor or f_Scale.\r
+ */\r
+ lo_gcd = MT2063_gcd(f_LO1, f_LO2);\r
+ gd_Scale = MT2063_umax((UData_t) MT2063_gcd(lo_gcd, d), f_Scale);\r
+ hgds = gd_Scale/2;\r
+ gc_Scale = MT2063_umax((UData_t) MT2063_gcd(lo_gcd, c), f_Scale);\r
+ hgcs = gc_Scale/2;\r
+ gf_Scale = MT2063_umax((UData_t) MT2063_gcd(lo_gcd, f), f_Scale);\r
+ hgfs = gf_Scale/2;\r
+\r
+ n0 = uceil(f_LO2 - d, f_LO1 - f_LO2);\r
+\r
+ /* Check out all multiples of LO1 from n0 to m_maxLOSpurHarmonic */\r
+ for (n=n0; n<=pAS_Info->maxH1; ++n)\r
+ {\r
+ md = (n*((f_LO1+hgds)/gd_Scale) - ((d+hgds)/gd_Scale)) / ((f_LO2+hgds)/gd_Scale);\r
+\r
+ /* If # fLO2 harmonics > m_maxLOSpurHarmonic, then no spurs present */\r
+ if (md >= pAS_Info->maxH1)\r
+ break;\r
+\r
+ ma = (n*((f_LO1+hgds)/gd_Scale) + ((d+hgds)/gd_Scale)) / ((f_LO2+hgds)/gd_Scale);\r
+\r
+ /* If no spurs between +/- (f_out + f_IFBW/2), then try next harmonic */\r
+ if (md == ma)\r
+ continue;\r
+\r
+ mc = (n*((f_LO1+hgcs)/gc_Scale) - ((c+hgcs)/gc_Scale)) / ((f_LO2+hgcs)/gc_Scale);\r
+ if (mc != md)\r
+ {\r
+ f_nsLO1 = (SData_t) (n*(f_LO1/gc_Scale));\r
+ f_nsLO2 = (SData_t) (mc*(f_LO2/gc_Scale));\r
+ f_Spur = (gc_Scale * (f_nsLO1 - f_nsLO2)) + n*(f_LO1 % gc_Scale) - mc*(f_LO2 % gc_Scale);\r
+\r
+ *fp = ((f_Spur - (SData_t) c) / (mc - n)) + 1;\r
+ *fm = (((SData_t) d - f_Spur) / (mc - n)) + 1;\r
+ return 1;\r
+ }\r
+\r
+ /* Location of Zero-IF-spur to be checked */\r
+ me = (n*((f_LO1+hgfs)/gf_Scale) + ((f+hgfs)/gf_Scale)) / ((f_LO2+hgfs)/gf_Scale);\r
+ mf = (n*((f_LO1+hgfs)/gf_Scale) - ((f+hgfs)/gf_Scale)) / ((f_LO2+hgfs)/gf_Scale);\r
+ if (me != mf)\r
+ {\r
+ f_nsLO1 = n*(f_LO1/gf_Scale);\r
+ f_nsLO2 = me*(f_LO2/gf_Scale);\r
+ f_Spur = (gf_Scale * (f_nsLO1 - f_nsLO2)) + n*(f_LO1 % gf_Scale) - me*(f_LO2 % gf_Scale);\r
+\r
+ *fp = ((f_Spur + (SData_t) f) / (me - n)) + 1;\r
+ *fm = (((SData_t) f - f_Spur) / (me - n)) + 1;\r
+ return 1;\r
+ }\r
+\r
+ mb = (n*((f_LO1+hgcs)/gc_Scale) + ((c+hgcs)/gc_Scale)) / ((f_LO2+hgcs)/gc_Scale);\r
+ if (ma != mb)\r
+ {\r
+ f_nsLO1 = n*(f_LO1/gc_Scale);\r
+ f_nsLO2 = ma*(f_LO2/gc_Scale);\r
+ f_Spur = (gc_Scale * (f_nsLO1 - f_nsLO2)) + n*(f_LO1 % gc_Scale) - ma*(f_LO2 % gc_Scale);\r
+\r
+ *fp = (((SData_t) d + f_Spur) / (ma - n)) + 1;\r
+ *fm = (-(f_Spur + (SData_t) c) / (ma - n)) + 1;\r
+ return 1;\r
+ }\r
+ }\r
+\r
+#if MT2063_TUNER_CNT > 1\r
+ /* If no spur found, see if there are more tuners on the same board */\r
+ for (index = 0; index < TunerCount; ++index)\r
+ {\r
+ adj = TunerList[index];\r
+ if (pAS_Info == adj) /* skip over our own data, don't process it */\r
+ continue;\r
+\r
+ /* Look for LO-related spurs from the adjacent tuner generated into my IF output */\r
+ if (IsSpurInAdjTunerBand(1, /* check my IF output */\r
+ pAS_Info->f_LO1, /* my fLO1 */\r
+ adj->f_LO1, /* the other tuner's fLO1 */\r
+ pAS_Info->f_LO2, /* my fLO2 */\r
+ pAS_Info->f_out, /* my fOut */\r
+ pAS_Info->f_out_bw, /* my output IF bandwidth */\r
+ pAS_Info->f_zif_bw, /* my Zero-IF bandwidth */\r
+ pAS_Info->maxH2,\r
+ fp, /* minimum amount to move LO's positive */\r
+ fm)) /* miminum amount to move LO's negative */\r
+ return 1;\r
+ /* Look for LO-related spurs from my tuner generated into the adjacent tuner's IF output */\r
+ if (IsSpurInAdjTunerBand(0, /* check his IF output */\r
+ pAS_Info->f_LO1, /* my fLO1 */\r
+ adj->f_LO1, /* the other tuner's fLO1 */\r
+ adj->f_LO2, /* the other tuner's fLO2 */\r
+ adj->f_out, /* the other tuner's fOut */\r
+ adj->f_out_bw, /* the other tuner's output IF bandwidth */\r
+ pAS_Info->f_zif_bw, /* the other tuner's Zero-IF bandwidth */\r
+ adj->maxH2,\r
+ fp, /* minimum amount to move LO's positive */\r
+ fm)) /* miminum amount to move LO's negative */\r
+ return 1;\r
+ }\r
+#endif\r
+ /* No spurs found */\r
+ return 0;\r
+}\r
+\r
+\r
+/*****************************************************************************\r
+**\r
+** Name: MT_AvoidSpurs\r
+**\r
+** Description: Main entry point to avoid spurs.\r
+** Checks for existing spurs in present LO1, LO2 freqs\r
+** and if present, chooses spur-free LO1, LO2 combination\r
+** that tunes the same input/output frequencies.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 096 04-06-2005 DAD Ver 1.11: Fix divide by 0 error if maxH==0.\r
+**\r
+*****************************************************************************/\r
+UData_t MT2063_AvoidSpurs(Handle_t h,\r
+ struct MT2063_AvoidSpursData_t* pAS_Info)\r
+{\r
+ UData_t status = MT2063_OK;\r
+ UData_t fm, fp; /* restricted range on LO's */\r
+ pAS_Info->bSpurAvoided = 0;\r
+ pAS_Info->nSpursFound = 0;\r
+\r
+ if (pAS_Info->maxH1 == 0)\r
+ return MT2063_OK;\r
+\r
+ /*\r
+ ** Avoid LO Generated Spurs\r
+ **\r
+ ** Make sure that have no LO-related spurs within the IF output\r
+ ** bandwidth.\r
+ **\r
+ ** If there is an LO spur in this band, start at the current IF1 frequency\r
+ ** and work out until we find a spur-free frequency or run up against the\r
+ ** 1st IF SAW band edge. Use temporary copies of fLO1 and fLO2 so that they\r
+ ** will be unchanged if a spur-free setting is not found.\r
+ */\r
+ pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);\r
+ if (pAS_Info->bSpurPresent)\r
+ {\r
+ UData_t zfIF1 = pAS_Info->f_LO1 - pAS_Info->f_in; /* current attempt at a 1st IF */\r
+ UData_t zfLO1 = pAS_Info->f_LO1; /* current attempt at an LO1 freq */\r
+ UData_t zfLO2 = pAS_Info->f_LO2; /* current attempt at an LO2 freq */\r
+ UData_t delta_IF1;\r
+ UData_t new_IF1;\r
+\r
+ /*\r
+ ** Spur was found, attempt to find a spur-free 1st IF\r
+ */\r
+ do\r
+ {\r
+ pAS_Info->nSpursFound++;\r
+\r
+ /* Raise f_IF1_upper, if needed */\r
+ MT2063_AddExclZone(pAS_Info, zfIF1 - fm, zfIF1 + fp);\r
+\r
+ /* Choose next IF1 that is closest to f_IF1_CENTER */\r
+ new_IF1 = MT2063_ChooseFirstIF(pAS_Info);\r
+\r
+ if (new_IF1 > zfIF1)\r
+ {\r
+ pAS_Info->f_LO1 += (new_IF1 - zfIF1);\r
+ pAS_Info->f_LO2 += (new_IF1 - zfIF1);\r
+ }\r
+ else\r
+ {\r
+ pAS_Info->f_LO1 -= (zfIF1 - new_IF1);\r
+ pAS_Info->f_LO2 -= (zfIF1 - new_IF1);\r
+ }\r
+ zfIF1 = new_IF1;\r
+\r
+ if (zfIF1 > pAS_Info->f_if1_Center)\r
+ delta_IF1 = zfIF1 - pAS_Info->f_if1_Center;\r
+ else\r
+ delta_IF1 = pAS_Info->f_if1_Center - zfIF1;\r
+ }\r
+ /*\r
+ ** Continue while the new 1st IF is still within the 1st IF bandwidth\r
+ ** and there is a spur in the band (again)\r
+ */\r
+ while ((2*delta_IF1 + pAS_Info->f_out_bw <= pAS_Info->f_if1_bw) &&\r
+ (pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp)));\r
+\r
+ /*\r
+ ** Use the LO-spur free values found. If the search went all the way to\r
+ ** the 1st IF band edge and always found spurs, just leave the original\r
+ ** choice. It's as "good" as any other.\r
+ */\r
+ if (pAS_Info->bSpurPresent == 1)\r
+ {\r
+ status |= MT2063_SPUR_PRESENT_ERR;\r
+ pAS_Info->f_LO1 = zfLO1;\r
+ pAS_Info->f_LO2 = zfLO2;\r
+ }\r
+ else\r
+ pAS_Info->bSpurAvoided = 1;\r
+ }\r
+\r
+ status |= ((pAS_Info->nSpursFound << MT2063_SPUR_SHIFT) & MT2063_SPUR_CNT_MASK);\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+UData_t MT2063_AvoidSpursVersion(void)\r
+{\r
+ return (MT2063_SPUR_VERSION);\r
+}\r
+//end of mt2063_spuravoid.c\r
+//=================================================================\r
+//#################################################################\r
+//=================================================================\r
+\r
+\r
+/*\r
+** The expected version of MT_AvoidSpursData_t\r
+** If the version is different, an updated file is needed from Microtune\r
+*/\r
+/* Expecting version 1.21 of the Spur Avoidance API */\r
+#define EXPECTED_MT2063_AVOID_SPURS_INFO_VERSION 010201\r
+\r
+#if MT2063_AVOID_SPURS_INFO_VERSION < EXPECTED_MT2063_AVOID_SPURS_INFO_VERSION\r
+#error Contact Microtune for a newer version of MT_SpurAvoid.c\r
+#elif MT2063_AVOID_SPURS_INFO_VERSION > EXPECTED_MT2063_AVOID_SPURS_INFO_VERSION\r
+#error Contact Microtune for a newer version of mt2063.c\r
+#endif\r
+\r
+#ifndef MT2063_CNT\r
+#error You must define MT2063_CNT in the "mt_userdef.h" file\r
+#endif\r
+\r
+\r
+typedef enum\r
+{\r
+ MT2063_SET_ATTEN,\r
+ MT2063_INCR_ATTEN,\r
+ MT2063_DECR_ATTEN\r
+} MT2063_ATTEN_CNTL_MODE;\r
+\r
+\r
+//#define TUNER_MT2063_OPTIMIZATION\r
+/*\r
+** Constants used by the tuning algorithm\r
+*/\r
+#define MT2063_REF_FREQ (16000000UL) /* Reference oscillator Frequency (in Hz) */\r
+#define MT2063_IF1_BW (22000000UL) /* The IF1 filter bandwidth (in Hz) */\r
+#define MT2063_TUNE_STEP_SIZE (50000UL) /* Tune in steps of 50 kHz */\r
+#define MT2063_SPUR_STEP_HZ (250000UL) /* Step size (in Hz) to move IF1 when avoiding spurs */\r
+#define MT2063_ZIF_BW (2000000UL) /* Zero-IF spur-free bandwidth (in Hz) */\r
+#define MT2063_MAX_HARMONICS_1 (15UL) /* Highest intra-tuner LO Spur Harmonic to be avoided */\r
+#define MT2063_MAX_HARMONICS_2 (5UL) /* Highest inter-tuner LO Spur Harmonic to be avoided */\r
+#define MT2063_MIN_LO_SEP (1000000UL) /* Minimum inter-tuner LO frequency separation */\r
+#define MT2063_LO1_FRACN_AVOID (0UL) /* LO1 FracN numerator avoid region (in Hz) */\r
+#define MT2063_LO2_FRACN_AVOID (199999UL) /* LO2 FracN numerator avoid region (in Hz) */\r
+#define MT2063_MIN_FIN_FREQ (44000000UL) /* Minimum input frequency (in Hz) */\r
+#define MT2063_MAX_FIN_FREQ (1100000000UL) /* Maximum input frequency (in Hz) */\r
+#define MT2063_MIN_FOUT_FREQ (36000000UL) /* Minimum output frequency (in Hz) */\r
+#define MT2063_MAX_FOUT_FREQ (57000000UL) /* Maximum output frequency (in Hz) */\r
+#define MT2063_MIN_DNC_FREQ (1293000000UL) /* Minimum LO2 frequency (in Hz) */\r
+#define MT2063_MAX_DNC_FREQ (1614000000UL) /* Maximum LO2 frequency (in Hz) */\r
+#define MT2063_MIN_UPC_FREQ (1396000000UL) /* Minimum LO1 frequency (in Hz) */\r
+#define MT2063_MAX_UPC_FREQ (2750000000UL) /* Maximum LO1 frequency (in Hz) */\r
+\r
+\r
+/*\r
+** Define the supported Part/Rev codes for the MT2063\r
+*/\r
+#define MT2063_B0 (0x9B)\r
+#define MT2063_B1 (0x9C)\r
+#define MT2063_B2 (0x9D)\r
+#define MT2063_B3 (0x9E)\r
+\r
+/*\r
+** The number of Tuner Registers\r
+*/\r
+static const UData_t MT2063_Num_Registers = MT2063_REG_END_REGS;\r
+\r
+\r
+#define USE_GLOBAL_TUNER 0\r
+\r
+static UData_t nMT2063MaxTuners = MT2063_CNT;\r
+static struct MT2063_Info_t MT2063_Info[MT2063_CNT];\r
+static struct MT2063_Info_t *MT2063_Avail[MT2063_CNT];\r
+static UData_t nMT2063OpenTuners = 0;\r
+\r
+\r
+/*\r
+** Constants for setting receiver modes.\r
+** (6 modes defined at this time, enumerated by MT2063_RCVR_MODES)\r
+** (DNC1GC & DNC2GC are the values, which are used, when the specific\r
+** DNC Output is selected, the other is always off)\r
+**\r
+** If PAL-L or L' is received, set:\r
+** MT2063_SetParam(hMT2063,MT2063_TAGC,1);\r
+**\r
+** --------------+----------------------------------------------\r
+** Mode 0 : | MT2063_CABLE_QAM\r
+** Mode 1 : | MT2063_CABLE_ANALOG\r
+** Mode 2 : | MT2063_OFFAIR_COFDM\r
+** Mode 3 : | MT2063_OFFAIR_COFDM_SAWLESS\r
+** Mode 4 : | MT2063_OFFAIR_ANALOG\r
+** Mode 5 : | MT2063_OFFAIR_8VSB\r
+** --------------+----+----+----+----+-----+-----+--------------\r
+** Mode | 0 | 1 | 2 | 3 | 4 | 5 |\r
+** --------------+----+----+----+----+-----+-----+\r
+**\r
+**\r
+*/\r
+static const U8Data RFAGCEN[] = { 0, 0, 0, 0, 0, 0 };\r
+static const U8Data LNARIN[] = { 0, 0, 3, 3, 3, 3 };\r
+static const U8Data FIFFQEN[] = { 1, 1, 1, 1, 1, 1 };\r
+static const U8Data FIFFQ[] = { 0, 0, 0, 0, 0, 0 };\r
+static const U8Data DNC1GC[] = { 0, 0, 0, 0, 0, 0 };\r
+static const U8Data DNC2GC[] = { 0, 0, 0, 0, 0, 0 };\r
+static const U8Data ACLNAMAX[] = { 31, 31, 31, 31, 31, 31 };\r
+static const U8Data LNATGT[] = { 44, 43, 43, 43, 43, 43 };\r
+static const U8Data RFOVDIS[] = { 0, 0, 0, 0, 0, 0 };\r
+static const U8Data ACRFMAX[] = { 31, 31, 31, 31, 31, 31 };\r
+static const U8Data PD1TGT[] = { 36, 36, 38, 38, 36, 38 };\r
+static const U8Data FIFOVDIS[] = { 0, 0, 0, 0, 0, 0 };\r
+static const U8Data ACFIFMAX[] = { 29, 29, 29, 29, 29, 29 };\r
+static const U8Data PD2TGT[] = { 40, 33, 38, 42, 30, 38 };\r
+\r
+/*\r
+** Local Function Prototypes - not available for external access.\r
+*/\r
+\r
+/* Forward declaration(s): */\r
+static UData_t MT2063_CalcLO1Mult(UData_t *Div, UData_t *FracN, UData_t f_LO, UData_t f_LO_Step, UData_t f_Ref);\r
+static UData_t MT2063_CalcLO2Mult(UData_t *Div, UData_t *FracN, UData_t f_LO, UData_t f_LO_Step, UData_t f_Ref);\r
+static UData_t MT2063_fLO_FractionalTerm(UData_t f_ref, UData_t num, UData_t denom);\r
+\r
+\r
+/******************************************************************************\r
+**\r
+** Name: MT2063_Open\r
+**\r
+** Description: Initialize the tuner's register values.\r
+**\r
+** Parameters: MT2063_Addr - Serial bus address of the tuner.\r
+** hMT2063 - Tuner handle passed back.\r
+** hUserData - User-defined data, if needed for the\r
+** MT_ReadSub() & MT_WriteSub functions.\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_TUNER_ID_ERR - Tuner Part/Rev code mismatch\r
+** MT_TUNER_INIT_ERR - Tuner initialization failed\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_ARG_NULL - Null pointer argument passed\r
+** MT_TUNER_CNT_ERR - Too many tuners open\r
+**\r
+** Dependencies: MT_ReadSub - Read byte(s) of data from the two-wire bus\r
+** MT_WriteSub - Write byte(s) of data to the two-wire bus\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+******************************************************************************/\r
+UData_t MT2063_Open(UData_t MT2063_Addr,\r
+ Handle_t* hMT2063,\r
+ Handle_t hUserData)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned. */\r
+ SData_t i;\r
+ struct MT2063_Info_t* pInfo = NULL;\r
+ struct dvb_frontend *fe= (struct dvb_frontend *)hUserData;\r
+ struct mt2063_state *state = fe->tuner_priv;\r
+\r
+ /* Check the argument before using */\r
+ if (hMT2063 == NULL)\r
+ { \r
+ return MT2063_ARG_NULL;\r
+ }\r
+ \r
+ /* Default tuner handle to NULL. If successful, it will be reassigned */\r
+ \r
+#if USE_GLOBAL_TUNER\r
+ *hMT2063 = NULL;\r
+\r
+ /*\r
+ ** If this is our first tuner, initialize the address fields and\r
+ ** the list of available control blocks.\r
+ */\r
+ if (nMT2063OpenTuners == 0)\r
+ {\r
+ for (i=MT2063_CNT-1; i>=0; i--)\r
+ {\r
+ MT2063_Info[i].handle = NULL;\r
+ MT2063_Info[i].address = MAX_UDATA;\r
+ MT2063_Info[i].rcvr_mode = MT2063_CABLE_QAM;\r
+ MT2063_Info[i].hUserData = NULL;\r
+ MT2063_Avail[i] = &MT2063_Info[i];\r
+ }\r
+ }\r
+\r
+ /*\r
+ ** Look for an existing MT2063_State_t entry with this address.\r
+ */\r
+ for (i=MT2063_CNT-1; i>=0; i--)\r
+ {\r
+ /*\r
+ ** If an open'ed handle provided, we'll re-initialize that structure.\r
+ **\r
+ ** We recognize an open tuner because the address and hUserData are\r
+ ** the same as one that has already been opened\r
+ */\r
+ if ((MT2063_Info[i].address == MT2063_Addr) &&\r
+ (MT2063_Info[i].hUserData == hUserData))\r
+ {\r
+ pInfo = &MT2063_Info[i];\r
+ break;\r
+ }\r
+ }\r
+\r
+ /* If not found, choose an empty spot. */\r
+ if (pInfo == NULL)\r
+ {\r
+ /* Check to see that we're not over-allocating */\r
+ if (nMT2063OpenTuners == MT2063_CNT)\r
+ { \r
+ return MT2063_TUNER_CNT_ERR;\r
+ }\r
+ /* Use the next available block from the list */\r
+ pInfo = MT2063_Avail[nMT2063OpenTuners];\r
+ nMT2063OpenTuners++;\r
+ }\r
+#else\r
+ if (state->MT2063_init==FALSE)\r
+ { \r
+ pInfo = kzalloc(sizeof (struct MT2063_Info_t), GFP_KERNEL);\r
+ if (pInfo == NULL)\r
+ { \r
+ return MT2063_TUNER_OPEN_ERR;\r
+ }\r
+ pInfo->handle = NULL;\r
+ pInfo->address = MAX_UDATA;\r
+ pInfo->rcvr_mode = MT2063_CABLE_QAM;\r
+ pInfo->hUserData = NULL;\r
+ }\r
+ else\r
+ { \r
+ pInfo = *hMT2063; \r
+ }\r
+#endif\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_RegisterTuner(&pInfo->AS_Data);\r
+ }\r
+ \r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ pInfo->handle = (Handle_t) pInfo;\r
+\r
+ pInfo->hUserData = hUserData;\r
+ pInfo->address = MT2063_Addr;\r
+ pInfo->rcvr_mode = MT2063_CABLE_QAM;\r
+ status |= MT2063_ReInit((Handle_t) pInfo);\r
+ }\r
+\r
+ if (MT2063_IS_ERROR(status))\r
+ /* MT2063_Close handles the un-registration of the tuner */\r
+ MT2063_Close((Handle_t) pInfo);\r
+ else\r
+ {\r
+ state->MT2063_init = TRUE;\r
+ *hMT2063 = pInfo->handle;\r
+\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+static UData_t MT2063_IsValidHandle(struct MT2063_Info_t* handle)\r
+{ \r
+ return ((handle != NULL) && (handle->handle == handle)) ? 1 : 0;\r
+}\r
+\r
+\r
+/******************************************************************************\r
+**\r
+** Name: MT2063_Close\r
+**\r
+** Description: Release the handle to the tuner.\r
+**\r
+** Parameters: hMT2063 - Handle to the MT2063 tuner\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+**\r
+** Dependencies: mt_errordef.h - definition of error codes\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+******************************************************************************/\r
+UData_t MT2063_Close(Handle_t hMT2063)\r
+{\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) hMT2063;\r
+\r
+ if (!MT2063_IsValidHandle(pInfo))\r
+ return MT2063_INV_HANDLE;\r
+\r
+ /* Unregister tuner with SpurAvoidance routines (if needed) */\r
+ MT2063_UnRegisterTuner(&pInfo->AS_Data);\r
+ /* Now remove the tuner from our own list of tuners */\r
+ pInfo->handle = NULL;\r
+ pInfo->address = MAX_UDATA;\r
+ pInfo->hUserData = NULL;\r
+ #if USE_GLOBAL_TUNER\r
+ nMT2063OpenTuners--;\r
+ MT2063_Avail[nMT2063OpenTuners] = pInfo; /* Return control block to available list */\r
+ #else\r
+ //kfree(pInfo);\r
+ //pInfo = NULL;\r
+ #endif\r
+ return MT2063_OK;\r
+}\r
+\r
+\r
+/******************************************************************************\r
+**\r
+** Name: MT2063_GetGPIO\r
+**\r
+** Description: Get the current MT2063 GPIO value.\r
+**\r
+** Parameters: h - Open handle to the tuner (from MT2063_Open).\r
+** gpio_id - Selects GPIO0, GPIO1 or GPIO2\r
+** attr - Selects input readback, I/O direction or\r
+** output value\r
+** *value - current setting of GPIO pin\r
+**\r
+** Usage: status = MT2063_GetGPIO(hMT2063, MT2063_GPIO_OUT, &value);\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_ARG_NULL - Null pointer argument passed\r
+**\r
+** Dependencies: MT_ReadSub - Read byte(s) of data from the serial bus\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+******************************************************************************/\r
+UData_t MT2063_GetGPIO(Handle_t h, enum MT2063_GPIO_ID gpio_id,\r
+ enum MT2063_GPIO_Attr attr,\r
+ UData_t* value)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ U8Data regno;\r
+ SData_t shift;\r
+ static U8Data GPIOreg[3] = {MT2063_REG_RF_STATUS, MT2063_REG_FIF_OV, MT2063_REG_RF_OV};\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ return MT2063_INV_HANDLE;\r
+\r
+ if (value == NULL)\r
+ return MT2063_ARG_NULL;\r
+\r
+ regno = GPIOreg[attr];\r
+\r
+ /* We'll read the register just in case the write didn't work last time */\r
+ status = MT2063_ReadSub(pInfo->hUserData, pInfo->address, regno, &pInfo->reg[regno], 1);\r
+\r
+ shift = (gpio_id - MT2063_GPIO0 + 5);\r
+ *value = (pInfo->reg[regno] >> shift) & 1;\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_GetLocked\r
+**\r
+** Description: Checks to see if LO1 and LO2 are locked.\r
+**\r
+** Parameters: h - Open handle to the tuner (from MT2063_Open).\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_UPC_UNLOCK - Upconverter PLL unlocked\r
+** MT_DNC_UNLOCK - Downconverter PLL unlocked\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+**\r
+** Dependencies: MT_ReadSub - Read byte(s) of data from the serial bus\r
+** MT_Sleep - Delay execution for x milliseconds\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_GetLocked(Handle_t h)\r
+{\r
+ const UData_t nMaxWait = 100; /* wait a maximum of 100 msec */\r
+ const UData_t nPollRate = 2; /* poll status bits every 2 ms */\r
+ const UData_t nMaxLoops = nMaxWait / nPollRate;\r
+ const U8Data LO1LK = 0x80;\r
+ U8Data LO2LK = 0x08;\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ UData_t nDelays = 0;\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ return MT2063_INV_HANDLE;\r
+\r
+ /* LO2 Lock bit was in a different place for B0 version */\r
+ if (pInfo->tuner_id == MT2063_B0)\r
+ LO2LK = 0x40;\r
+\r
+ do\r
+ {\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO_STATUS, &pInfo->reg[MT2063_REG_LO_STATUS], 1);\r
+\r
+ if (MT2063_IS_ERROR(status))\r
+ return (status);\r
+\r
+ if ((pInfo->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) == (LO1LK | LO2LK))\r
+ {\r
+ return (status);\r
+ }\r
+ MT2063_Sleep(pInfo->hUserData, nPollRate); /* Wait between retries */\r
+ }\r
+ while (++nDelays < nMaxLoops);\r
+\r
+ if ((pInfo->reg[MT2063_REG_LO_STATUS] & LO1LK) == 0x00)\r
+ status |= MT2063_UPC_UNLOCK;\r
+ if ((pInfo->reg[MT2063_REG_LO_STATUS] & LO2LK) == 0x00)\r
+ status |= MT2063_DNC_UNLOCK;\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_GetParam\r
+**\r
+** Description: Gets a tuning algorithm parameter.\r
+**\r
+** This function provides access to the internals of the\r
+** tuning algorithm - mostly for testing purposes.\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** param - Tuning algorithm parameter\r
+** (see enum MT2063_Param)\r
+** pValue - ptr to returned value\r
+**\r
+** param Description\r
+** ---------------------- --------------------------------\r
+** MT2063_IC_ADDR Serial Bus address of this tuner\r
+** MT2063_MAX_OPEN Max # of MT2063's allowed open\r
+** MT2063_NUM_OPEN # of MT2063's open\r
+** MT2063_SRO_FREQ crystal frequency\r
+** MT2063_STEPSIZE minimum tuning step size\r
+** MT2063_INPUT_FREQ input center frequency\r
+** MT2063_LO1_FREQ LO1 Frequency\r
+** MT2063_LO1_STEPSIZE LO1 minimum step size\r
+** MT2063_LO1_FRACN_AVOID LO1 FracN keep-out region\r
+** MT2063_IF1_ACTUAL Current 1st IF in use\r
+** MT2063_IF1_REQUEST Requested 1st IF\r
+** MT2063_IF1_CENTER Center of 1st IF SAW filter\r
+** MT2063_IF1_BW Bandwidth of 1st IF SAW filter\r
+** MT2063_ZIF_BW zero-IF bandwidth\r
+** MT2063_LO2_FREQ LO2 Frequency\r
+** MT2063_LO2_STEPSIZE LO2 minimum step size\r
+** MT2063_LO2_FRACN_AVOID LO2 FracN keep-out region\r
+** MT2063_OUTPUT_FREQ output center frequency\r
+** MT2063_OUTPUT_BW output bandwidth\r
+** MT2063_LO_SEPARATION min inter-tuner LO separation\r
+** MT2063_AS_ALG ID of avoid-spurs algorithm in use\r
+** MT2063_MAX_HARM1 max # of intra-tuner harmonics\r
+** MT2063_MAX_HARM2 max # of inter-tuner harmonics\r
+** MT2063_EXCL_ZONES # of 1st IF exclusion zones\r
+** MT2063_NUM_SPURS # of spurs found/avoided\r
+** MT2063_SPUR_AVOIDED >0 spurs avoided\r
+** MT2063_SPUR_PRESENT >0 spurs in output (mathematically)\r
+** MT2063_RCVR_MODE Predefined modes.\r
+** MT2063_ACLNA LNA attenuator gain code\r
+** MT2063_ACRF RF attenuator gain code\r
+** MT2063_ACFIF FIF attenuator gain code\r
+** MT2063_ACLNA_MAX LNA attenuator limit\r
+** MT2063_ACRF_MAX RF attenuator limit\r
+** MT2063_ACFIF_MAX FIF attenuator limit\r
+** MT2063_PD1 Actual value of PD1\r
+** MT2063_PD2 Actual value of PD2\r
+** MT2063_DNC_OUTPUT_ENABLE DNC output selection\r
+** MT2063_VGAGC VGA gain code\r
+** MT2063_VGAOI VGA output current\r
+** MT2063_TAGC TAGC setting\r
+** MT2063_AMPGC AMP gain code\r
+** MT2063_AVOID_DECT Avoid DECT Frequencies\r
+** MT2063_CTFILT_SW Cleartune filter selection\r
+**\r
+** Usage: status |= MT2063_GetParam(hMT2063,\r
+** MT2063_IF1_ACTUAL,\r
+** &f_IF1_Actual);\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_ARG_NULL - Null pointer argument passed\r
+** MT_ARG_RANGE - Invalid parameter requested\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** See Also: MT2063_SetParam, MT2063_Open\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+** 154 09-13-2007 RSK Ver 1.05: Get/SetParam changes for LOx_FREQ\r
+** 10-31-2007 PINZ Ver 1.08: Get/SetParam add VGAGC, VGAOI, AMPGC, TAGC\r
+** 173 M 01-23-2008 RSK Ver 1.12: Read LO1C and LO2C registers from HW\r
+** in GetParam.\r
+** 04-18-2008 PINZ Ver 1.15: Add SetParam LNARIN & PDxTGT\r
+** Split SetParam up to ACLNA / ACLNA_MAX\r
+** removed ACLNA_INRC/DECR (+RF & FIF)\r
+** removed GCUAUTO / BYPATNDN/UP\r
+** 175 I 16-06-2008 PINZ Ver 1.16: Add control to avoid US DECT freqs.\r
+** 175 I 06-19-2008 RSK Ver 1.17: Refactor DECT control to SpurAvoid.\r
+** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_GetParam(Handle_t h,\r
+ enum MT2063_Param param,\r
+ UData_t* pValue)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+ UData_t Div;\r
+ UData_t Num;\r
+\r
+ if (pValue == NULL)\r
+ status |= MT2063_ARG_NULL;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status |= MT2063_INV_HANDLE;\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ switch (param)\r
+ {\r
+ /* Serial Bus address of this tuner */\r
+ case MT2063_IC_ADDR:\r
+ *pValue = pInfo->address;\r
+ break;\r
+\r
+ /* Max # of MT2063's allowed to be open */\r
+ case MT2063_MAX_OPEN:\r
+ *pValue = nMT2063MaxTuners;\r
+ break;\r
+\r
+ /* # of MT2063's open */\r
+ case MT2063_NUM_OPEN:\r
+ *pValue = nMT2063OpenTuners;\r
+ break;\r
+\r
+ /* crystal frequency */\r
+ case MT2063_SRO_FREQ:\r
+ *pValue = pInfo->AS_Data.f_ref;\r
+ break;\r
+\r
+ /* minimum tuning step size */\r
+ case MT2063_STEPSIZE:\r
+ *pValue = pInfo->AS_Data.f_LO2_Step;\r
+ break;\r
+\r
+ /* input center frequency */\r
+ case MT2063_INPUT_FREQ:\r
+ *pValue = pInfo->AS_Data.f_in;\r
+ break;\r
+\r
+ /* LO1 Frequency */\r
+ case MT2063_LO1_FREQ:\r
+ {\r
+ /* read the actual tuner register values for LO1C_1 and LO1C_2 */\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO1C_1, &pInfo->reg[MT2063_REG_LO1C_1], 2);\r
+ Div = pInfo->reg[MT2063_REG_LO1C_1];\r
+ Num = pInfo->reg[MT2063_REG_LO1C_2] & 0x3F;\r
+ pInfo->AS_Data.f_LO1 = (pInfo->AS_Data.f_ref * Div) + MT2063_fLO_FractionalTerm(pInfo->AS_Data.f_ref, Num, 64);\r
+ }\r
+ *pValue = pInfo->AS_Data.f_LO1;\r
+ break;\r
+\r
+ /* LO1 minimum step size */\r
+ case MT2063_LO1_STEPSIZE:\r
+ *pValue = pInfo->AS_Data.f_LO1_Step;\r
+ break;\r
+\r
+ /* LO1 FracN keep-out region */\r
+ case MT2063_LO1_FRACN_AVOID_PARAM:\r
+ *pValue = pInfo->AS_Data.f_LO1_FracN_Avoid;\r
+ break;\r
+\r
+ /* Current 1st IF in use */\r
+ case MT2063_IF1_ACTUAL:\r
+ *pValue = pInfo->f_IF1_actual;\r
+ break;\r
+\r
+ /* Requested 1st IF */\r
+ case MT2063_IF1_REQUEST:\r
+ *pValue = pInfo->AS_Data.f_if1_Request;\r
+ break;\r
+\r
+ /* Center of 1st IF SAW filter */\r
+ case MT2063_IF1_CENTER:\r
+ *pValue = pInfo->AS_Data.f_if1_Center;\r
+ break;\r
+\r
+ /* Bandwidth of 1st IF SAW filter */\r
+ case MT2063_IF1_BW:\r
+ *pValue = pInfo->AS_Data.f_if1_bw;\r
+ break;\r
+\r
+ /* zero-IF bandwidth */\r
+ case MT2063_ZIF_BW:\r
+ *pValue = pInfo->AS_Data.f_zif_bw;\r
+ break;\r
+\r
+ /* LO2 Frequency */\r
+ case MT2063_LO2_FREQ:\r
+ {\r
+ /* Read the actual tuner register values for LO2C_1, LO2C_2 and LO2C_3 */\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO2C_1, &pInfo->reg[MT2063_REG_LO2C_1], 3);\r
+ Div = (pInfo->reg[MT2063_REG_LO2C_1] & 0xFE ) >> 1;\r
+ Num = ((pInfo->reg[MT2063_REG_LO2C_1] & 0x01 ) << 12) | (pInfo->reg[MT2063_REG_LO2C_2] << 4) | (pInfo->reg[MT2063_REG_LO2C_3] & 0x00F);\r
+ pInfo->AS_Data.f_LO2 = (pInfo->AS_Data.f_ref * Div) + MT2063_fLO_FractionalTerm(pInfo->AS_Data.f_ref, Num, 8191);\r
+ }\r
+ *pValue = pInfo->AS_Data.f_LO2;\r
+ break;\r
+\r
+ /* LO2 minimum step size */\r
+ case MT2063_LO2_STEPSIZE:\r
+ *pValue = pInfo->AS_Data.f_LO2_Step;\r
+ break;\r
+\r
+ /* LO2 FracN keep-out region */\r
+ case MT2063_LO2_FRACN_AVOID:\r
+ *pValue = pInfo->AS_Data.f_LO2_FracN_Avoid;\r
+ break;\r
+\r
+ /* output center frequency */\r
+ case MT2063_OUTPUT_FREQ:\r
+ *pValue = pInfo->AS_Data.f_out;\r
+ break;\r
+\r
+ /* output bandwidth */\r
+ case MT2063_OUTPUT_BW:\r
+ *pValue = pInfo->AS_Data.f_out_bw - 750000;\r
+ break;\r
+\r
+ /* min inter-tuner LO separation */\r
+ case MT2063_LO_SEPARATION:\r
+ *pValue = pInfo->AS_Data.f_min_LO_Separation;\r
+ break;\r
+\r
+ /* ID of avoid-spurs algorithm in use */\r
+ case MT2063_AS_ALG:\r
+ *pValue = pInfo->AS_Data.nAS_Algorithm;\r
+ break;\r
+\r
+ /* max # of intra-tuner harmonics */\r
+ case MT2063_MAX_HARM1:\r
+ *pValue = pInfo->AS_Data.maxH1;\r
+ break;\r
+\r
+ /* max # of inter-tuner harmonics */\r
+ case MT2063_MAX_HARM2:\r
+ *pValue = pInfo->AS_Data.maxH2;\r
+ break;\r
+\r
+ /* # of 1st IF exclusion zones */\r
+ case MT2063_EXCL_ZONES:\r
+ *pValue = pInfo->AS_Data.nZones;\r
+ break;\r
+\r
+ /* # of spurs found/avoided */\r
+ case MT2063_NUM_SPURS:\r
+ *pValue = pInfo->AS_Data.nSpursFound;\r
+ break;\r
+\r
+ /* >0 spurs avoided */\r
+ case MT2063_SPUR_AVOIDED:\r
+ *pValue = pInfo->AS_Data.bSpurAvoided;\r
+ break;\r
+\r
+ /* >0 spurs in output (mathematically) */\r
+ case MT2063_SPUR_PRESENT:\r
+ *pValue = pInfo->AS_Data.bSpurPresent;\r
+ break;\r
+\r
+ /* Predefined receiver setup combination */\r
+ case MT2063_RCVR_MODE:\r
+ *pValue = pInfo->rcvr_mode;\r
+ break;\r
+\r
+ case MT2063_PD1:\r
+ case MT2063_PD2:\r
+ {\r
+ U8Data mask = (param == MT2063_PD1 ? 0x01 : 0x03); /* PD1 vs PD2 */\r
+ U8Data orig = (pInfo->reg[MT2063_REG_BYP_CTRL]);\r
+ U8Data reg = (orig & 0xF1) | mask; /* Only set 3 bits (not 5) */\r
+ int i;\r
+\r
+ *pValue = 0;\r
+\r
+ /* Initiate ADC output to reg 0x0A */\r
+ if (reg != orig)\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_BYP_CTRL, ®, 1);\r
+\r
+ if (MT2063_IS_ERROR(status))\r
+ return (status);\r
+\r
+ for (i=0; i<8; i++) {\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_ADC_OUT, &pInfo->reg[MT2063_REG_ADC_OUT], 1);\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ *pValue += pInfo->reg[MT2063_REG_ADC_OUT];\r
+ else\r
+ {\r
+ if( i ) *pValue /= i;\r
+ return (status);\r
+ }\r
+ }\r
+ *pValue /= 8; /* divide by number of reads */\r
+ *pValue >>=2; /* only want 6 MSB's out of 8 */\r
+\r
+ /* Restore value of Register BYP_CTRL */\r
+ if (reg != orig)\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_BYP_CTRL, &orig, 1);\r
+ }\r
+ break;\r
+\r
+ /* Get LNA attenuator code */\r
+ case MT2063_ACLNA:\r
+ {\r
+ U8Data val;\r
+ status |= MT2063_GetReg(pInfo, MT2063_REG_XO_STATUS, &val);\r
+ *pValue = val & 0x1f;\r
+ }\r
+ break;\r
+\r
+ /* Get RF attenuator code */\r
+ case MT2063_ACRF:\r
+ {\r
+ U8Data val;\r
+ status |= MT2063_GetReg(pInfo, MT2063_REG_RF_STATUS, &val);\r
+ *pValue = val & 0x1f;\r
+ }\r
+ break;\r
+\r
+ /* Get FIF attenuator code */\r
+ case MT2063_ACFIF:\r
+ {\r
+ U8Data val;\r
+ status |= MT2063_GetReg(pInfo, MT2063_REG_FIF_STATUS, &val);\r
+ *pValue = val & 0x1f;\r
+ }\r
+ break;\r
+\r
+ /* Get LNA attenuator limit */\r
+ case MT2063_ACLNA_MAX:\r
+ {\r
+ U8Data val;\r
+ status |= MT2063_GetReg(pInfo, MT2063_REG_LNA_OV, &val);\r
+ *pValue = val & 0x1f;\r
+ }\r
+ break;\r
+\r
+ /* Get RF attenuator limit */\r
+ case MT2063_ACRF_MAX:\r
+ {\r
+ U8Data val;\r
+ status |= MT2063_GetReg(pInfo, MT2063_REG_RF_OV, &val);\r
+ *pValue = val & 0x1f;\r
+ }\r
+ break;\r
+\r
+ /* Get FIF attenuator limit */\r
+ case MT2063_ACFIF_MAX:\r
+ {\r
+ U8Data val;\r
+ status |= MT2063_GetReg(pInfo, MT2063_REG_FIF_OV, &val);\r
+ *pValue = val & 0x1f;\r
+ }\r
+ break;\r
+\r
+ /* Get current used DNC output */\r
+ case MT2063_DNC_OUTPUT_ENABLE:\r
+ {\r
+ if ( (pInfo->reg[MT2063_REG_DNC_GAIN] & 0x03) == 0x03) /* if DNC1 is off */\r
+ {\r
+ if ( (pInfo->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */\r
+ *pValue = (UData_t)MT2063_DNC_NONE;\r
+ else\r
+ *pValue = (UData_t)MT2063_DNC_2;\r
+ }\r
+ else /* DNC1 is on */\r
+ {\r
+ if ( (pInfo->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */\r
+ *pValue = (UData_t)MT2063_DNC_1;\r
+ else\r
+ *pValue = (UData_t)MT2063_DNC_BOTH;\r
+ }\r
+ }\r
+ break;\r
+\r
+ /* Get VGA Gain Code */\r
+ case MT2063_VGAGC:\r
+ *pValue = ( (pInfo->reg[MT2063_REG_VGA_GAIN] & 0x0C) >> 2 );\r
+ break;\r
+\r
+ /* Get VGA bias current */\r
+ case MT2063_VGAOI:\r
+ *pValue = (pInfo->reg[MT2063_REG_RSVD_31] & 0x07);\r
+ break;\r
+\r
+ /* Get TAGC setting */\r
+ case MT2063_TAGC:\r
+ *pValue = (pInfo->reg[MT2063_REG_RSVD_1E] & 0x03);\r
+ break;\r
+\r
+ /* Get AMP Gain Code */\r
+ case MT2063_AMPGC:\r
+ *pValue = (pInfo->reg[MT2063_REG_TEMP_SEL] & 0x03);\r
+ break;\r
+\r
+ /* Avoid DECT Frequencies */\r
+ case MT2063_AVOID_DECT:\r
+ *pValue = pInfo->AS_Data.avoidDECT;\r
+ break;\r
+\r
+ /* Cleartune filter selection: 0 - by IC (default), 1 - by software */\r
+ case MT2063_CTFILT_SW:\r
+ *pValue = pInfo->ctfilt_sw;\r
+ break;\r
+\r
+ case MT2063_EOP:\r
+ default:\r
+ status |= MT2063_ARG_RANGE;\r
+ }\r
+ }\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_GetReg\r
+**\r
+** Description: Gets an MT2063 register.\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** reg - MT2063 register/subaddress location\r
+** *val - MT2063 register/subaddress value\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_ARG_NULL - Null pointer argument passed\r
+** MT_ARG_RANGE - Argument out of range\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** Use this function if you need to read a register from\r
+** the MT2063.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_GetReg(Handle_t h,\r
+ U8Data reg,\r
+ U8Data* val)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status |= MT2063_INV_HANDLE;\r
+\r
+ if (val == NULL)\r
+ status |= MT2063_ARG_NULL;\r
+\r
+ if (reg >= MT2063_REG_END_REGS)\r
+ status |= MT2063_ARG_RANGE;\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, reg, &pInfo->reg[reg], 1);\r
+ if (MT2063_NO_ERROR(status))\r
+ *val = pInfo->reg[reg];\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/******************************************************************************\r
+**\r
+** Name: MT2063_GetTemp\r
+**\r
+** Description: Get the MT2063 Temperature register.\r
+**\r
+** Parameters: h - Open handle to the tuner (from MT2063_Open).\r
+** *value - value read from the register\r
+**\r
+** Binary\r
+** Value Returned Value Approx Temp\r
+** ---------------------------------------------\r
+** MT2063_T_0C 0000 0C\r
+** MT2063_T_10C 0001 10C\r
+** MT2063_T_20C 0010 20C\r
+** MT2063_T_30C 0011 30C\r
+** MT2063_T_40C 0100 40C\r
+** MT2063_T_50C 0101 50C\r
+** MT2063_T_60C 0110 60C\r
+** MT2063_T_70C 0111 70C\r
+** MT2063_T_80C 1000 80C\r
+** MT2063_T_90C 1001 90C\r
+** MT2063_T_100C 1010 100C\r
+** MT2063_T_110C 1011 110C\r
+** MT2063_T_120C 1100 120C\r
+** MT2063_T_130C 1101 130C\r
+** MT2063_T_140C 1110 140C\r
+** MT2063_T_150C 1111 150C\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_ARG_NULL - Null pointer argument passed\r
+** MT_ARG_RANGE - Argument out of range\r
+**\r
+** Dependencies: MT_ReadSub - Read byte(s) of data from the two-wire bus\r
+** MT_WriteSub - Write byte(s) of data to the two-wire bus\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+******************************************************************************/\r
+UData_t MT2063_GetTemp(Handle_t h, enum MT2063_Temperature* value)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ return MT2063_INV_HANDLE;\r
+\r
+ if (value == NULL)\r
+ return MT2063_ARG_NULL;\r
+\r
+ if ((MT2063_NO_ERROR(status)) && ((pInfo->reg[MT2063_REG_TEMP_SEL] & 0xE0) != 0x00))\r
+ {\r
+ pInfo->reg[MT2063_REG_TEMP_SEL] &= (0x1F);\r
+ status |= MT2063_WriteSub(pInfo->hUserData,\r
+ pInfo->address,\r
+ MT2063_REG_TEMP_SEL,\r
+ &pInfo->reg[MT2063_REG_TEMP_SEL],\r
+ 1);\r
+ }\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ status |= MT2063_ReadSub(pInfo->hUserData,\r
+ pInfo->address,\r
+ MT2063_REG_TEMP_STATUS,\r
+ &pInfo->reg[MT2063_REG_TEMP_STATUS],\r
+ 1);\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ *value = (enum MT2063_Temperature) (pInfo->reg[MT2063_REG_TEMP_STATUS] >> 4);\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_GetUserData\r
+**\r
+** Description: Gets the user-defined data item.\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_ARG_NULL - Null pointer argument passed\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** The hUserData parameter is a user-specific argument\r
+** that is stored internally with the other tuner-\r
+** specific information.\r
+**\r
+** For example, if additional arguments are needed\r
+** for the user to identify the device communicating\r
+** with the tuner, this argument can be used to supply\r
+** the necessary information.\r
+**\r
+** The hUserData parameter is initialized in the tuner's\r
+** Open function to NULL.\r
+**\r
+** See Also: MT2063_Open\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_GetUserData(Handle_t h,\r
+ Handle_t* hUserData)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status = MT2063_INV_HANDLE;\r
+\r
+ if (hUserData == NULL)\r
+ status |= MT2063_ARG_NULL;\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ *hUserData = pInfo->hUserData;\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+\r
+/******************************************************************************\r
+**\r
+** Name: MT2063_SetReceiverMode\r
+**\r
+** Description: Set the MT2063 receiver mode\r
+**\r
+** --------------+----------------------------------------------\r
+** Mode 0 : | MT2063_CABLE_QAM\r
+** Mode 1 : | MT2063_CABLE_ANALOG\r
+** Mode 2 : | MT2063_OFFAIR_COFDM\r
+** Mode 3 : | MT2063_OFFAIR_COFDM_SAWLESS\r
+** Mode 4 : | MT2063_OFFAIR_ANALOG\r
+** Mode 5 : | MT2063_OFFAIR_8VSB\r
+** --------------+----+----+----+----+-----+--------------------\r
+** (DNC1GC & DNC2GC are the values, which are used, when the specific\r
+** DNC Output is selected, the other is always off)\r
+**\r
+** |<---------- Mode -------------->|\r
+** Reg Field | 0 | 1 | 2 | 3 | 4 | 5 |\r
+** ------------+-----+-----+-----+-----+-----+-----+\r
+** RFAGCen | OFF | OFF | OFF | OFF | OFF | OFF\r
+** LNARin | 0 | 0 | 3 | 3 | 3 | 3\r
+** FIFFQen | 1 | 1 | 1 | 1 | 1 | 1\r
+** FIFFq | 0 | 0 | 0 | 0 | 0 | 0\r
+** DNC1gc | 0 | 0 | 0 | 0 | 0 | 0\r
+** DNC2gc | 0 | 0 | 0 | 0 | 0 | 0\r
+** GCU Auto | 1 | 1 | 1 | 1 | 1 | 1\r
+** LNA max Atn | 31 | 31 | 31 | 31 | 31 | 31\r
+** LNA Target | 44 | 43 | 43 | 43 | 43 | 43\r
+** ign RF Ovl | 0 | 0 | 0 | 0 | 0 | 0\r
+** RF max Atn | 31 | 31 | 31 | 31 | 31 | 31\r
+** PD1 Target | 36 | 36 | 38 | 38 | 36 | 38\r
+** ign FIF Ovl | 0 | 0 | 0 | 0 | 0 | 0\r
+** FIF max Atn | 5 | 5 | 5 | 5 | 5 | 5\r
+** PD2 Target | 40 | 33 | 42 | 42 | 33 | 42\r
+**\r
+**\r
+** Parameters: pInfo - ptr to MT2063_Info_t structure\r
+** Mode - desired reciever mode\r
+**\r
+** Usage: status = MT2063_SetReceiverMode(hMT2063, Mode);\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+**\r
+** Dependencies: MT2063_SetReg - Write a byte of data to a HW register.\r
+** Assumes that the tuner cache is valid.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+** N/A 01-10-2007 PINZ Added additional GCU Settings, FIFF Calib will be triggered\r
+** 155 10-01-2007 DAD Ver 1.06: Add receiver mode for SECAM positive\r
+** modulation\r
+** (MT2063_ANALOG_TV_POS_NO_RFAGC_MODE)\r
+** N/A 10-22-2007 PINZ Ver 1.07: Changed some Registers at init to have\r
+** the same settings as with MT Launcher\r
+** N/A 10-30-2007 PINZ Add SetParam VGAGC & VGAOI\r
+** Add SetParam DNC_OUTPUT_ENABLE\r
+** Removed VGAGC from receiver mode,\r
+** default now 1\r
+** N/A 10-31-2007 PINZ Ver 1.08: Add SetParam TAGC, removed from rcvr-mode\r
+** Add SetParam AMPGC, removed from rcvr-mode\r
+** Corrected names of GCU values\r
+** reorganized receiver modes, removed,\r
+** (MT2063_ANALOG_TV_POS_NO_RFAGC_MODE)\r
+** Actualized Receiver-Mode values\r
+** N/A 11-12-2007 PINZ Ver 1.09: Actualized Receiver-Mode values\r
+** N/A 11-27-2007 PINZ Improved buffered writing\r
+** 01-03-2008 PINZ Ver 1.10: Added a trigger of BYPATNUP for\r
+** correct wakeup of the LNA after shutdown\r
+** Set AFCsd = 1 as default\r
+** Changed CAP1sel default\r
+** 01-14-2008 PINZ Ver 1.11: Updated gain settings\r
+** 04-18-2008 PINZ Ver 1.15: Add SetParam LNARIN & PDxTGT\r
+** Split SetParam up to ACLNA / ACLNA_MAX\r
+** removed ACLNA_INRC/DECR (+RF & FIF)\r
+** removed GCUAUTO / BYPATNDN/UP\r
+**\r
+******************************************************************************/\r
+static UData_t MT2063_SetReceiverMode(struct MT2063_Info_t* pInfo, enum MT2063_RCVR_MODES Mode)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ U8Data val;\r
+ UData_t longval;\r
+\r
+\r
+ if (Mode >= MT2063_NUM_RCVR_MODES)\r
+ status = MT2063_ARG_RANGE;\r
+\r
+ /* RFAGCen */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ val = (pInfo->reg[MT2063_REG_PD1_TGT] & (U8Data)~0x40) | (RFAGCEN[Mode] ? 0x40 : 0x00);\r
+ if( pInfo->reg[MT2063_REG_PD1_TGT] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_PD1_TGT, val);\r
+ }\r
+ }\r
+\r
+ /* LNARin */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_SetParam(pInfo, MT2063_LNA_RIN, LNARIN[Mode]);\r
+ }\r
+\r
+ /* FIFFQEN and FIFFQ */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ val = (pInfo->reg[MT2063_REG_FIFF_CTRL2] & (U8Data)~0xF0) | (FIFFQEN[Mode] << 7) | (FIFFQ[Mode] << 4);\r
+ if( pInfo->reg[MT2063_REG_FIFF_CTRL2] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL2, val);\r
+ /* trigger FIFF calibration, needed after changing FIFFQ */\r
+ val = (pInfo->reg[MT2063_REG_FIFF_CTRL] | (U8Data)0x01);\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL, val);\r
+ val = (pInfo->reg[MT2063_REG_FIFF_CTRL] & (U8Data)~0x01);\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL, val);\r
+ }\r
+ }\r
+\r
+ /* DNC1GC & DNC2GC */\r
+ status |= MT2063_GetParam(pInfo, MT2063_DNC_OUTPUT_ENABLE, &longval);\r
+ status |= MT2063_SetParam(pInfo, MT2063_DNC_OUTPUT_ENABLE, longval);\r
+\r
+ /* acLNAmax */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_SetParam(pInfo, MT2063_ACLNA_MAX, ACLNAMAX[Mode]);\r
+ }\r
+\r
+ /* LNATGT */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_SetParam(pInfo, MT2063_LNA_TGT, LNATGT[Mode]);\r
+ }\r
+\r
+ /* ACRF */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_SetParam(pInfo, MT2063_ACRF_MAX, ACRFMAX[Mode]);\r
+ }\r
+\r
+ /* PD1TGT */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_SetParam(pInfo, MT2063_PD1_TGT, PD1TGT[Mode]);\r
+ }\r
+\r
+ /* FIFATN */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_SetParam(pInfo, MT2063_ACFIF_MAX, ACFIFMAX[Mode]);\r
+ }\r
+\r
+ /* PD2TGT */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_SetParam(pInfo, MT2063_PD2_TGT, PD2TGT[Mode]);\r
+ }\r
+\r
+ /* Ignore ATN Overload */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ val = (pInfo->reg[MT2063_REG_LNA_TGT] & (U8Data)~0x80) | (RFOVDIS[Mode] ? 0x80 : 0x00);\r
+ if( pInfo->reg[MT2063_REG_LNA_TGT] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_LNA_TGT, val);\r
+ }\r
+ }\r
+\r
+ /* Ignore FIF Overload */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ val = (pInfo->reg[MT2063_REG_PD1_TGT] & (U8Data)~0x80) | (FIFOVDIS[Mode] ? 0x80 : 0x00);\r
+ if( pInfo->reg[MT2063_REG_PD1_TGT] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_PD1_TGT, val);\r
+ }\r
+ }\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ pInfo->rcvr_mode = Mode;\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/******************************************************************************\r
+**\r
+** Name: MT2063_ReInit\r
+**\r
+** Description: Initialize the tuner's register values.\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_TUNER_ID_ERR - Tuner Part/Rev code mismatch\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_COMM_ERR - Serial bus communications error\r
+**\r
+** Dependencies: MT_ReadSub - Read byte(s) of data from the two-wire bus\r
+** MT_WriteSub - Write byte(s) of data to the two-wire bus\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+** 148 09-04-2007 RSK Ver 1.02: Corrected logic of Reg 3B Reference\r
+** 153 09-07-2007 RSK Ver 1.03: Lock Time improvements\r
+** N/A 10-31-2007 PINZ Ver 1.08: Changed values suitable to rcvr-mode 0\r
+** N/A 11-12-2007 PINZ Ver 1.09: Changed values suitable to rcvr-mode 0\r
+** N/A 01-03-2007 PINZ Ver 1.10: Added AFCsd = 1 into defaults\r
+** N/A 01-04-2007 PINZ Ver 1.10: Changed CAP1sel default\r
+** 01-14-2008 PINZ Ver 1.11: Updated gain settings\r
+** 03-18-2008 PINZ Ver 1.13: Added Support for B3\r
+** 175 I 06-19-2008 RSK Ver 1.17: Refactor DECT control to SpurAvoid.\r
+** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW\r
+**\r
+******************************************************************************/\r
+UData_t MT2063_ReInit(Handle_t h)\r
+{\r
+ U8Data all_resets = 0xF0; /* reset/load bits */\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+ U8Data *def;\r
+\r
+ U8Data MT2063B0_defaults[] = { /* Reg, Value */\r
+ 0x19, 0x05,\r
+ 0x1B, 0x1D,\r
+ 0x1C, 0x1F,\r
+ 0x1D, 0x0F,\r
+ 0x1E, 0x3F,\r
+ 0x1F, 0x0F,\r
+ 0x20, 0x3F,\r
+ 0x22, 0x21,\r
+ 0x23, 0x3F,\r
+ 0x24, 0x20,\r
+ 0x25, 0x3F,\r
+ 0x27, 0xEE,\r
+ 0x2C, 0x27, /* bit at 0x20 is cleared below */\r
+ 0x30, 0x03,\r
+ 0x2C, 0x07, /* bit at 0x20 is cleared here */\r
+ 0x2D, 0x87,\r
+ 0x2E, 0xAA,\r
+ 0x28, 0xE1, /* Set the FIFCrst bit here */\r
+ 0x28, 0xE0, /* Clear the FIFCrst bit here */\r
+ 0x00 };\r
+\r
+ /* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */\r
+ U8Data MT2063B1_defaults[] = { /* Reg, Value */\r
+ 0x05, 0xF0,\r
+ 0x11, 0x10, /* New Enable AFCsd */\r
+ 0x19, 0x05,\r
+ 0x1A, 0x6C,\r
+ 0x1B, 0x24,\r
+ 0x1C, 0x28,\r
+ 0x1D, 0x8F,\r
+ 0x1E, 0x14,\r
+ 0x1F, 0x8F,\r
+ 0x20, 0x57,\r
+ 0x22, 0x21, /* New - ver 1.03 */\r
+ 0x23, 0x3C, /* New - ver 1.10 */\r
+ 0x24, 0x20, /* New - ver 1.03 */\r
+ 0x2C, 0x24, /* bit at 0x20 is cleared below */\r
+ 0x2D, 0x87, /* FIFFQ=0 */\r
+ 0x2F, 0xF3,\r
+ 0x30, 0x0C, /* New - ver 1.11 */\r
+ 0x31, 0x1B, /* New - ver 1.11 */\r
+ 0x2C, 0x04, /* bit at 0x20 is cleared here */\r
+ 0x28, 0xE1, /* Set the FIFCrst bit here */\r
+ 0x28, 0xE0, /* Clear the FIFCrst bit here */\r
+ 0x00 };\r
+\r
+ /* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */\r
+ U8Data MT2063B3_defaults[] = { /* Reg, Value */\r
+ 0x05, 0xF0,\r
+ 0x19, 0x3D,\r
+ 0x2C, 0x24, /* bit at 0x20 is cleared below */\r
+ 0x2C, 0x04, /* bit at 0x20 is cleared here */\r
+ 0x28, 0xE1, /* Set the FIFCrst bit here */\r
+ 0x28, 0xE0, /* Clear the FIFCrst bit here */\r
+ 0x00 };\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status |= MT2063_INV_HANDLE;\r
+\r
+ /* Read the Part/Rev code from the tuner */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_PART_REV, pInfo->reg, 1);\r
+ }\r
+ \r
+ if (MT2063_NO_ERROR(status) /* Check the part/rev code */\r
+ && ( (pInfo->reg[MT2063_REG_PART_REV] != MT2063_B0) /* MT2063 B0 */\r
+ && (pInfo->reg[MT2063_REG_PART_REV] != MT2063_B1) /* MT2063 B1 */\r
+ && (pInfo->reg[MT2063_REG_PART_REV] != MT2063_B3))) /* MT2063 B3 */\r
+ status |= MT2063_TUNER_ID_ERR; /* Wrong tuner Part/Rev code */\r
+\r
+ /* Read the Part/Rev code (2nd byte) from the tuner */\r
+ if (MT2063_NO_ERROR(status))\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_RSVD_3B, &pInfo->reg[MT2063_REG_RSVD_3B], 1);\r
+\r
+ if (MT2063_NO_ERROR(status) /* Check the 2nd part/rev code */\r
+ && ((pInfo->reg[MT2063_REG_RSVD_3B] & 0x80) != 0x00)) /* b7 != 0 ==> NOT MT2063 */\r
+ status |= MT2063_TUNER_ID_ERR; /* Wrong tuner Part/Rev code */\r
+ \r
+ /* Reset the tuner */\r
+ if (MT2063_NO_ERROR(status))\r
+ status |= MT2063_WriteSub(pInfo->hUserData,\r
+ pInfo->address,\r
+ MT2063_REG_LO2CQ_3,\r
+ &all_resets,\r
+ 1);\r
+\r
+ /* change all of the default values that vary from the HW reset values */\r
+ /* def = (pInfo->reg[PART_REV] == MT2063_B0) ? MT2063B0_defaults : MT2063B1_defaults; */\r
+ switch (pInfo->reg[MT2063_REG_PART_REV])\r
+ {\r
+ case MT2063_B3 :\r
+ def = MT2063B3_defaults;\r
+ break;\r
+\r
+ case MT2063_B1 :\r
+ def = MT2063B1_defaults;\r
+ break;\r
+\r
+ case MT2063_B0 :\r
+ def = MT2063B0_defaults;\r
+ break;\r
+\r
+ default :\r
+ status |= MT2063_TUNER_ID_ERR;\r
+ break;\r
+ }\r
+\r
+ while (MT2063_NO_ERROR(status) && *def)\r
+ {\r
+ U8Data reg = *def++;\r
+ U8Data val = *def++;\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, reg, &val, 1);\r
+ }\r
+\r
+ /* Wait for FIFF location to complete. */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ UData_t FCRUN = 1;\r
+ SData_t maxReads = 10;\r
+ while (MT2063_NO_ERROR(status) && (FCRUN != 0) && (maxReads-- > 0))\r
+ {\r
+ MT2063_Sleep(pInfo->hUserData, 2);\r
+ status |= MT2063_ReadSub(pInfo->hUserData,\r
+ pInfo->address,\r
+ MT2063_REG_XO_STATUS,\r
+ &pInfo->reg[MT2063_REG_XO_STATUS],\r
+ 1);\r
+ FCRUN = (pInfo->reg[MT2063_REG_XO_STATUS] & 0x40) >> 6;\r
+ }\r
+\r
+ if (FCRUN != 0)\r
+ status |= MT2063_TUNER_INIT_ERR | MT2063_TUNER_TIMEOUT;\r
+\r
+ if (MT2063_NO_ERROR(status)) /* Re-read FIFFC value */\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_FIFFC, &pInfo->reg[MT2063_REG_FIFFC], 1);\r
+ }\r
+\r
+ /* Read back all the registers from the tuner */\r
+ if (MT2063_NO_ERROR(status))\r
+ status |= MT2063_ReadSub(pInfo->hUserData,\r
+ pInfo->address,\r
+ MT2063_REG_PART_REV,\r
+ pInfo->reg,\r
+ MT2063_REG_END_REGS);\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ /* Initialize the tuner state. */\r
+ pInfo->version = MT2063_VERSION;\r
+ pInfo->tuner_id = pInfo->reg[MT2063_REG_PART_REV];\r
+ pInfo->AS_Data.f_ref = MT2063_REF_FREQ;\r
+ pInfo->AS_Data.f_if1_Center = (pInfo->AS_Data.f_ref / 8) * ((UData_t) pInfo->reg[MT2063_REG_FIFFC] + 640);\r
+ pInfo->AS_Data.f_if1_bw = MT2063_IF1_BW;\r
+ pInfo->AS_Data.f_out = 43750000UL;\r
+ pInfo->AS_Data.f_out_bw = 6750000UL;\r
+ pInfo->AS_Data.f_zif_bw = MT2063_ZIF_BW;\r
+ pInfo->AS_Data.f_LO1_Step = pInfo->AS_Data.f_ref / 64;\r
+ pInfo->AS_Data.f_LO2_Step = MT2063_TUNE_STEP_SIZE;\r
+ pInfo->AS_Data.maxH1 = MT2063_MAX_HARMONICS_1;\r
+ pInfo->AS_Data.maxH2 = MT2063_MAX_HARMONICS_2;\r
+ pInfo->AS_Data.f_min_LO_Separation = MT2063_MIN_LO_SEP;\r
+ pInfo->AS_Data.f_if1_Request = pInfo->AS_Data.f_if1_Center;\r
+ pInfo->AS_Data.f_LO1 = 2181000000UL;\r
+ pInfo->AS_Data.f_LO2 = 1486249786UL;\r
+ pInfo->f_IF1_actual = pInfo->AS_Data.f_if1_Center;\r
+ pInfo->AS_Data.f_in = pInfo->AS_Data.f_LO1 - pInfo->f_IF1_actual;\r
+ pInfo->AS_Data.f_LO1_FracN_Avoid = MT2063_LO1_FRACN_AVOID;\r
+ pInfo->AS_Data.f_LO2_FracN_Avoid = MT2063_LO2_FRACN_AVOID;\r
+ pInfo->num_regs = MT2063_REG_END_REGS;\r
+ pInfo->AS_Data.avoidDECT = MT2063_AVOID_BOTH;\r
+ pInfo->ctfilt_sw = 0;\r
+ }\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ pInfo->CTFiltMax[ 0] = 69230000;\r
+ pInfo->CTFiltMax[ 1] = 105770000;\r
+ pInfo->CTFiltMax[ 2] = 140350000;\r
+ pInfo->CTFiltMax[ 3] = 177110000;\r
+ pInfo->CTFiltMax[ 4] = 212860000;\r
+ pInfo->CTFiltMax[ 5] = 241130000;\r
+ pInfo->CTFiltMax[ 6] = 274370000;\r
+ pInfo->CTFiltMax[ 7] = 309820000;\r
+ pInfo->CTFiltMax[ 8] = 342450000;\r
+ pInfo->CTFiltMax[ 9] = 378870000;\r
+ pInfo->CTFiltMax[10] = 416210000;\r
+ pInfo->CTFiltMax[11] = 456500000;\r
+ pInfo->CTFiltMax[12] = 495790000;\r
+ pInfo->CTFiltMax[13] = 534530000;\r
+ pInfo->CTFiltMax[14] = 572610000;\r
+ pInfo->CTFiltMax[15] = 598970000;\r
+ pInfo->CTFiltMax[16] = 635910000;\r
+ pInfo->CTFiltMax[17] = 672130000;\r
+ pInfo->CTFiltMax[18] = 714840000;\r
+ pInfo->CTFiltMax[19] = 739660000;\r
+ pInfo->CTFiltMax[20] = 770410000;\r
+ pInfo->CTFiltMax[21] = 814660000;\r
+ pInfo->CTFiltMax[22] = 846950000;\r
+ pInfo->CTFiltMax[23] = 867820000;\r
+ pInfo->CTFiltMax[24] = 915980000;\r
+ pInfo->CTFiltMax[25] = 947450000;\r
+ pInfo->CTFiltMax[26] = 983110000;\r
+ pInfo->CTFiltMax[27] = 1021630000;\r
+ pInfo->CTFiltMax[28] = 1061870000;\r
+ pInfo->CTFiltMax[29] = 1098330000;\r
+ pInfo->CTFiltMax[30] = 1138990000;\r
+ }\r
+\r
+ /*\r
+ ** Fetch the FCU osc value and use it and the fRef value to\r
+ ** scale all of the Band Max values\r
+ */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ UData_t fcu_osc;\r
+ UData_t i;\r
+\r
+ pInfo->reg[MT2063_REG_CTUNE_CTRL] = 0x0A;\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_CTUNE_CTRL, &pInfo->reg[MT2063_REG_CTUNE_CTRL], 1);\r
+ /* Read the ClearTune filter calibration value */\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_FIFFC, &pInfo->reg[MT2063_REG_FIFFC], 1);\r
+ fcu_osc = pInfo->reg[MT2063_REG_FIFFC];\r
+\r
+ pInfo->reg[MT2063_REG_CTUNE_CTRL] = 0x00;\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_CTUNE_CTRL, &pInfo->reg[MT2063_REG_CTUNE_CTRL], 1);\r
+ \r
+ /* Adjust each of the values in the ClearTune filter cross-over table */\r
+ for (i = 0; i < 31; i++)\r
+ {\r
+ pInfo->CTFiltMax[i] = (pInfo->CTFiltMax[i]/768) * (fcu_osc + 640);\r
+ }\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/******************************************************************************\r
+**\r
+** Name: MT2063_SetGPIO\r
+**\r
+** Description: Modify the MT2063 GPIO value.\r
+**\r
+** Parameters: h - Open handle to the tuner (from MT2063_Open).\r
+** gpio_id - Selects GPIO0, GPIO1 or GPIO2\r
+** attr - Selects input readback, I/O direction or\r
+** output value\r
+** value - value to set GPIO pin 15, 14 or 19\r
+**\r
+** Usage: status = MT2063_SetGPIO(hMT2063, MT2063_GPIO1, MT2063_GPIO_OUT, 1);\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+**\r
+** Dependencies: MT_WriteSub - Write byte(s) of data to the two-wire-bus\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+******************************************************************************/\r
+UData_t MT2063_SetGPIO(Handle_t h, enum MT2063_GPIO_ID gpio_id,\r
+ enum MT2063_GPIO_Attr attr,\r
+ UData_t value)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ U8Data regno;\r
+ SData_t shift;\r
+ static U8Data GPIOreg[3] = {0x15, 0x19, 0x18};\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ return MT2063_INV_HANDLE;\r
+\r
+ regno = GPIOreg[attr];\r
+\r
+ shift = (gpio_id - MT2063_GPIO0 + 5);\r
+\r
+ if (value & 0x01)\r
+ pInfo->reg[regno] |= (0x01 << shift);\r
+ else\r
+ pInfo->reg[regno] &= ~(0x01 << shift);\r
+ status = MT2063_WriteSub(pInfo->hUserData, pInfo->address, regno, &pInfo->reg[regno], 1);\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_SetParam\r
+**\r
+** Description: Sets a tuning algorithm parameter.\r
+**\r
+** This function provides access to the internals of the\r
+** tuning algorithm. You can override many of the tuning\r
+** algorithm defaults using this function.\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** param - Tuning algorithm parameter\r
+** (see enum MT2063_Param)\r
+** nValue - value to be set\r
+**\r
+** param Description\r
+** ---------------------- --------------------------------\r
+** MT2063_SRO_FREQ crystal frequency\r
+** MT2063_STEPSIZE minimum tuning step size\r
+** MT2063_LO1_FREQ LO1 frequency\r
+** MT2063_LO1_STEPSIZE LO1 minimum step size\r
+** MT2063_LO1_FRACN_AVOID LO1 FracN keep-out region\r
+** MT2063_IF1_REQUEST Requested 1st IF\r
+** MT2063_ZIF_BW zero-IF bandwidth\r
+** MT2063_LO2_FREQ LO2 frequency\r
+** MT2063_LO2_STEPSIZE LO2 minimum step size\r
+** MT2063_LO2_FRACN_AVOID LO2 FracN keep-out region\r
+** MT2063_OUTPUT_FREQ output center frequency\r
+** MT2063_OUTPUT_BW output bandwidth\r
+** MT2063_LO_SEPARATION min inter-tuner LO separation\r
+** MT2063_MAX_HARM1 max # of intra-tuner harmonics\r
+** MT2063_MAX_HARM2 max # of inter-tuner harmonics\r
+** MT2063_RCVR_MODE Predefined modes\r
+** MT2063_LNA_RIN Set LNA Rin (*)\r
+** MT2063_LNA_TGT Set target power level at LNA (*)\r
+** MT2063_PD1_TGT Set target power level at PD1 (*)\r
+** MT2063_PD2_TGT Set target power level at PD2 (*)\r
+** MT2063_ACLNA_MAX LNA attenuator limit (*)\r
+** MT2063_ACRF_MAX RF attenuator limit (*)\r
+** MT2063_ACFIF_MAX FIF attenuator limit (*)\r
+** MT2063_DNC_OUTPUT_ENABLE DNC output selection\r
+** MT2063_VGAGC VGA gain code\r
+** MT2063_VGAOI VGA output current\r
+** MT2063_TAGC TAGC setting\r
+** MT2063_AMPGC AMP gain code\r
+** MT2063_AVOID_DECT Avoid DECT Frequencies\r
+** MT2063_CTFILT_SW Cleartune filter selection\r
+**\r
+** (*) This parameter is set by MT2063_RCVR_MODE, do not call\r
+** additionally.\r
+**\r
+** Usage: status |= MT2063_SetParam(hMT2063,\r
+** MT2063_STEPSIZE,\r
+** 50000);\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_ARG_NULL - Null pointer argument passed\r
+** MT_ARG_RANGE - Invalid parameter requested\r
+** or set value out of range\r
+** or non-writable parameter\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** See Also: MT2063_GetParam, MT2063_Open\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+** 154 09-13-2007 RSK Ver 1.05: Get/SetParam changes for LOx_FREQ\r
+** 10-31-2007 PINZ Ver 1.08: Get/SetParam add VGAGC, VGAOI, AMPGC, TAGC\r
+** 04-18-2008 PINZ Ver 1.15: Add SetParam LNARIN & PDxTGT\r
+** Split SetParam up to ACLNA / ACLNA_MAX\r
+** removed ACLNA_INRC/DECR (+RF & FIF)\r
+** removed GCUAUTO / BYPATNDN/UP\r
+** 175 I 06-06-2008 PINZ Ver 1.16: Add control to avoid US DECT freqs.\r
+** 175 I 06-19-2008 RSK Ver 1.17: Refactor DECT control to SpurAvoid.\r
+** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_SetParam(Handle_t h,\r
+ enum MT2063_Param param,\r
+ UData_t nValue)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ U8Data val=0;\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status |= MT2063_INV_HANDLE;\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ switch (param)\r
+ {\r
+ /* crystal frequency */\r
+ case MT2063_SRO_FREQ:\r
+ pInfo->AS_Data.f_ref = nValue;\r
+ pInfo->AS_Data.f_LO1_FracN_Avoid = 0;\r
+ pInfo->AS_Data.f_LO2_FracN_Avoid = nValue / 80 - 1;\r
+ pInfo->AS_Data.f_LO1_Step = nValue / 64;\r
+ pInfo->AS_Data.f_if1_Center = (pInfo->AS_Data.f_ref / 8) * (pInfo->reg[MT2063_REG_FIFFC] + 640);\r
+ break;\r
+\r
+ /* minimum tuning step size */\r
+ case MT2063_STEPSIZE:\r
+ pInfo->AS_Data.f_LO2_Step = nValue;\r
+ break;\r
+\r
+\r
+ /* LO1 frequency */\r
+ case MT2063_LO1_FREQ:\r
+ {\r
+ /* Note: LO1 and LO2 are BOTH written at toggle of LDLOos */\r
+ /* Capture the Divider and Numerator portions of other LO */\r
+ U8Data tempLO2CQ[3];\r
+ U8Data tempLO2C[3];\r
+ U8Data tmpOneShot;\r
+ UData_t Div, FracN;\r
+ U8Data restore = 0;\r
+\r
+ /* Buffer the queue for restoration later and get actual LO2 values. */\r
+ status |= MT2063_ReadSub (pInfo->hUserData, pInfo->address, MT2063_REG_LO2CQ_1, &(tempLO2CQ[0]), 3);\r
+ status |= MT2063_ReadSub (pInfo->hUserData, pInfo->address, MT2063_REG_LO2C_1, &(tempLO2C[0]), 3);\r
+\r
+ /* clear the one-shot bits */\r
+ tempLO2CQ[2] = tempLO2CQ[2] & 0x0F;\r
+ tempLO2C[2] = tempLO2C[2] & 0x0F;\r
+\r
+ /* only write the queue values if they are different from the actual. */\r
+ if( ( tempLO2CQ[0] != tempLO2C[0] ) ||\r
+ ( tempLO2CQ[1] != tempLO2C[1] ) ||\r
+ ( tempLO2CQ[2] != tempLO2C[2] ) )\r
+ {\r
+ /* put actual LO2 value into queue (with 0 in one-shot bits) */\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO2CQ_1, &(tempLO2C[0]), 3);\r
+\r
+ if( status == MT2063_OK )\r
+ {\r
+ /* cache the bytes just written. */\r
+ pInfo->reg[MT2063_REG_LO2CQ_1] = tempLO2C[0];\r
+ pInfo->reg[MT2063_REG_LO2CQ_2] = tempLO2C[1];\r
+ pInfo->reg[MT2063_REG_LO2CQ_3] = tempLO2C[2];\r
+ }\r
+ restore = 1;\r
+ }\r
+\r
+ /* Calculate the Divider and Numberator components of LO1 */\r
+ status = MT2063_CalcLO1Mult(&Div, &FracN, nValue, pInfo->AS_Data.f_ref/64, pInfo->AS_Data.f_ref);\r
+ pInfo->reg[MT2063_REG_LO1CQ_1] = (U8Data)(Div & 0x00FF);\r
+ pInfo->reg[MT2063_REG_LO1CQ_2] = (U8Data)(FracN);\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO1CQ_1, &pInfo->reg[MT2063_REG_LO1CQ_1], 2);\r
+\r
+ /* set the one-shot bit to load the pair of LO values */\r
+ tmpOneShot = tempLO2CQ[2] | 0xE0;\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO2CQ_3, &tmpOneShot, 1);\r
+\r
+ /* only restore the queue values if they were different from the actual. */\r
+ if( restore )\r
+ {\r
+ /* put actual LO2 value into queue (0 in one-shot bits) */\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO2CQ_1, &(tempLO2CQ[0]), 3);\r
+\r
+ /* cache the bytes just written. */\r
+ pInfo->reg[MT2063_REG_LO2CQ_1] = tempLO2CQ[0];\r
+ pInfo->reg[MT2063_REG_LO2CQ_2] = tempLO2CQ[1];\r
+ pInfo->reg[MT2063_REG_LO2CQ_3] = tempLO2CQ[2];\r
+ }\r
+\r
+ MT2063_GetParam( pInfo->hUserData, MT2063_LO1_FREQ, &pInfo->AS_Data.f_LO1 );\r
+ }\r
+ break;\r
+\r
+ /* LO1 minimum step size */\r
+ case MT2063_LO1_STEPSIZE:\r
+ pInfo->AS_Data.f_LO1_Step = nValue;\r
+ break;\r
+\r
+ /* LO1 FracN keep-out region */\r
+ case MT2063_LO1_FRACN_AVOID_PARAM:\r
+ pInfo->AS_Data.f_LO1_FracN_Avoid = nValue;\r
+ break;\r
+\r
+ /* Requested 1st IF */\r
+ case MT2063_IF1_REQUEST:\r
+ pInfo->AS_Data.f_if1_Request = nValue;\r
+ break;\r
+\r
+ /* zero-IF bandwidth */\r
+ case MT2063_ZIF_BW:\r
+ pInfo->AS_Data.f_zif_bw = nValue;\r
+ break;\r
+\r
+ /* LO2 frequency */\r
+ case MT2063_LO2_FREQ:\r
+ {\r
+ /* Note: LO1 and LO2 are BOTH written at toggle of LDLOos */\r
+ /* Capture the Divider and Numerator portions of other LO */\r
+ U8Data tempLO1CQ[2];\r
+ U8Data tempLO1C[2];\r
+ UData_t Div2;\r
+ UData_t FracN2;\r
+ U8Data tmpOneShot;\r
+ U8Data restore = 0;\r
+\r
+ /* Buffer the queue for restoration later and get actual LO2 values. */\r
+ status |= MT2063_ReadSub (pInfo->hUserData, pInfo->address, MT2063_REG_LO1CQ_1, &(tempLO1CQ[0]), 2);\r
+ status |= MT2063_ReadSub (pInfo->hUserData, pInfo->address, MT2063_REG_LO1C_1, &(tempLO1C[0]), 2);\r
+\r
+ /* only write the queue values if they are different from the actual. */\r
+ if( (tempLO1CQ[0] != tempLO1C[0]) || (tempLO1CQ[1] != tempLO1C[1]) )\r
+ {\r
+ /* put actual LO1 value into queue */\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO1CQ_1, &(tempLO1C[0]), 2);\r
+\r
+ /* cache the bytes just written. */\r
+ pInfo->reg[MT2063_REG_LO1CQ_1] = tempLO1C[0];\r
+ pInfo->reg[MT2063_REG_LO1CQ_2] = tempLO1C[1];\r
+ restore = 1;\r
+ }\r
+\r
+ /* Calculate the Divider and Numberator components of LO2 */\r
+ status = MT2063_CalcLO2Mult(&Div2, &FracN2, nValue, pInfo->AS_Data.f_ref/8191, pInfo->AS_Data.f_ref);\r
+ pInfo->reg[MT2063_REG_LO2CQ_1] = (U8Data)((Div2 << 1) | ((FracN2 >> 12) & 0x01) ) & 0xFF;\r
+ pInfo->reg[MT2063_REG_LO2CQ_2] = (U8Data)((FracN2 >> 4) & 0xFF);\r
+ pInfo->reg[MT2063_REG_LO2CQ_3] = (U8Data)((FracN2 & 0x0F) );\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO1CQ_1, &pInfo->reg[MT2063_REG_LO1CQ_1], 3);\r
+\r
+ /* set the one-shot bit to load the LO values */\r
+ tmpOneShot = pInfo->reg[MT2063_REG_LO2CQ_3] | 0xE0;\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO2CQ_3, &tmpOneShot, 1);\r
+\r
+ /* only restore LO1 queue value if they were different from the actual. */\r
+ if( restore )\r
+ {\r
+ /* put previous LO1 queue value back into queue */\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO1CQ_1, &(tempLO1CQ[0]), 2);\r
+\r
+ /* cache the bytes just written. */\r
+ pInfo->reg[MT2063_REG_LO1CQ_1] = tempLO1CQ[0];\r
+ pInfo->reg[MT2063_REG_LO1CQ_2] = tempLO1CQ[1];\r
+ }\r
+\r
+ MT2063_GetParam( pInfo->hUserData, MT2063_LO2_FREQ, &pInfo->AS_Data.f_LO2 );\r
+ }\r
+ break;\r
+\r
+ /* LO2 minimum step size */\r
+ case MT2063_LO2_STEPSIZE:\r
+ pInfo->AS_Data.f_LO2_Step = nValue;\r
+ break;\r
+\r
+ /* LO2 FracN keep-out region */\r
+ case MT2063_LO2_FRACN_AVOID:\r
+ pInfo->AS_Data.f_LO2_FracN_Avoid = nValue;\r
+ break;\r
+\r
+ /* output center frequency */\r
+ case MT2063_OUTPUT_FREQ:\r
+ pInfo->AS_Data.f_out = nValue;\r
+ break;\r
+\r
+ /* output bandwidth */\r
+ case MT2063_OUTPUT_BW:\r
+ pInfo->AS_Data.f_out_bw = nValue + 750000;\r
+ break;\r
+\r
+ /* min inter-tuner LO separation */\r
+ case MT2063_LO_SEPARATION:\r
+ pInfo->AS_Data.f_min_LO_Separation = nValue;\r
+ break;\r
+\r
+ /* max # of intra-tuner harmonics */\r
+ case MT2063_MAX_HARM1:\r
+ pInfo->AS_Data.maxH1 = nValue;\r
+ break;\r
+\r
+ /* max # of inter-tuner harmonics */\r
+ case MT2063_MAX_HARM2:\r
+ pInfo->AS_Data.maxH2 = nValue;\r
+ break;\r
+\r
+ case MT2063_RCVR_MODE:\r
+ status |= MT2063_SetReceiverMode(pInfo, (enum MT2063_RCVR_MODES)nValue);\r
+ break;\r
+\r
+ /* Set LNA Rin -- nValue is desired value */\r
+ case MT2063_LNA_RIN:\r
+ val = ( pInfo->reg[MT2063_REG_CTRL_2C] & (U8Data)~0x03) | (nValue & 0x03);\r
+ if( pInfo->reg[MT2063_REG_CTRL_2C] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_CTRL_2C, val);\r
+ }\r
+ break;\r
+\r
+ /* Set target power level at LNA -- nValue is desired value */\r
+ case MT2063_LNA_TGT:\r
+ val = ( pInfo->reg[MT2063_REG_LNA_TGT] & (U8Data)~0x3F) | (nValue & 0x3F);\r
+ if( pInfo->reg[MT2063_REG_LNA_TGT] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_LNA_TGT, val);\r
+ }\r
+ break;\r
+\r
+ /* Set target power level at PD1 -- nValue is desired value */\r
+ case MT2063_PD1_TGT:\r
+ val = ( pInfo->reg[MT2063_REG_PD1_TGT] & (U8Data)~0x3F) | (nValue & 0x3F);\r
+ if( pInfo->reg[MT2063_REG_PD1_TGT] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_PD1_TGT, val);\r
+ }\r
+ break;\r
+\r
+ /* Set target power level at PD2 -- nValue is desired value */\r
+ case MT2063_PD2_TGT:\r
+ val = ( pInfo->reg[MT2063_REG_PD2_TGT] & (U8Data)~0x3F) | (nValue & 0x3F);\r
+ if( pInfo->reg[MT2063_REG_PD2_TGT] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_PD2_TGT, val);\r
+ }\r
+ break;\r
+\r
+ /* Set LNA atten limit -- nValue is desired value */\r
+ case MT2063_ACLNA_MAX:\r
+ val = ( pInfo->reg[MT2063_REG_LNA_OV] & (U8Data)~0x1F) | (nValue & 0x1F);\r
+ if( pInfo->reg[MT2063_REG_LNA_OV] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_LNA_OV, val);\r
+ }\r
+ break;\r
+\r
+ /* Set RF atten limit -- nValue is desired value */\r
+ case MT2063_ACRF_MAX:\r
+ val = ( pInfo->reg[MT2063_REG_RF_OV] & (U8Data)~0x1F) | (nValue & 0x1F);\r
+ if( pInfo->reg[MT2063_REG_RF_OV] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_RF_OV, val);\r
+ }\r
+ break;\r
+\r
+ /* Set FIF atten limit -- nValue is desired value, max. 5 if no B3 */\r
+ case MT2063_ACFIF_MAX:\r
+ if ( pInfo->reg[MT2063_REG_PART_REV] != MT2063_B3 && nValue > 5)\r
+ nValue = 5;\r
+ val = ( pInfo->reg[MT2063_REG_FIF_OV] & (U8Data)~0x1F) | (nValue & 0x1F);\r
+ if( pInfo->reg[MT2063_REG_FIF_OV] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_FIF_OV, val);\r
+ }\r
+ break;\r
+\r
+ case MT2063_DNC_OUTPUT_ENABLE:\r
+ /* selects, which DNC output is used */\r
+ switch ((enum MT2063_DNC_Output_Enable)nValue)\r
+ {\r
+ case MT2063_DNC_NONE :\r
+ {\r
+ val = (pInfo->reg[MT2063_REG_DNC_GAIN] & 0xFC ) | 0x03; /* Set DNC1GC=3 */\r
+ if (pInfo->reg[MT2063_REG_DNC_GAIN] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_DNC_GAIN, val);\r
+\r
+ val = (pInfo->reg[MT2063_REG_VGA_GAIN] & 0xFC ) | 0x03; /* Set DNC2GC=3 */\r
+ if (pInfo->reg[MT2063_REG_VGA_GAIN] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_VGA_GAIN, val);\r
+\r
+ val = (pInfo->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */\r
+ if (pInfo->reg[MT2063_REG_RSVD_20] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_RSVD_20, val);\r
+\r
+ break;\r
+ }\r
+ case MT2063_DNC_1 :\r
+ {\r
+ val = (pInfo->reg[MT2063_REG_DNC_GAIN] & 0xFC ) | (DNC1GC[pInfo->rcvr_mode] & 0x03); /* Set DNC1GC=x */\r
+ if (pInfo->reg[MT2063_REG_DNC_GAIN] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_DNC_GAIN, val);\r
+\r
+ val = (pInfo->reg[MT2063_REG_VGA_GAIN] & 0xFC ) | 0x03; /* Set DNC2GC=3 */\r
+ if (pInfo->reg[MT2063_REG_VGA_GAIN] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_VGA_GAIN, val);\r
+\r
+ val = (pInfo->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */\r
+ if (pInfo->reg[MT2063_REG_RSVD_20] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_RSVD_20, val);\r
+\r
+ break;\r
+ }\r
+ case MT2063_DNC_2 :\r
+ {\r
+ val = (pInfo->reg[MT2063_REG_DNC_GAIN] & 0xFC ) | 0x03; /* Set DNC1GC=3 */\r
+ if (pInfo->reg[MT2063_REG_DNC_GAIN] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_DNC_GAIN, val);\r
+\r
+ val = (pInfo->reg[MT2063_REG_VGA_GAIN] & 0xFC ) | (DNC2GC[pInfo->rcvr_mode] & 0x03); /* Set DNC2GC=x */\r
+ if (pInfo->reg[MT2063_REG_VGA_GAIN] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_VGA_GAIN, val);\r
+\r
+ val = (pInfo->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */\r
+ if (pInfo->reg[MT2063_REG_RSVD_20] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_RSVD_20, val);\r
+\r
+ break;\r
+ }\r
+ case MT2063_DNC_BOTH :\r
+ {\r
+ val = (pInfo->reg[MT2063_REG_DNC_GAIN] & 0xFC ) | (DNC1GC[pInfo->rcvr_mode] & 0x03); /* Set DNC1GC=x */\r
+ if (pInfo->reg[MT2063_REG_DNC_GAIN] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_DNC_GAIN, val);\r
+\r
+ val = (pInfo->reg[MT2063_REG_VGA_GAIN] & 0xFC ) | (DNC2GC[pInfo->rcvr_mode] & 0x03); /* Set DNC2GC=x */\r
+ if (pInfo->reg[MT2063_REG_VGA_GAIN] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_VGA_GAIN, val);\r
+\r
+ val = (pInfo->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */\r
+ if (pInfo->reg[MT2063_REG_RSVD_20] != val)\r
+ status |= MT2063_SetReg(h, MT2063_REG_RSVD_20, val);\r
+\r
+ break;\r
+ }\r
+ default : break;\r
+ }\r
+ break;\r
+\r
+ case MT2063_VGAGC:\r
+ /* Set VGA gain code */\r
+ val = (pInfo->reg[MT2063_REG_VGA_GAIN] & (U8Data)~0x0C) | ( (nValue & 0x03) << 2);\r
+ if( pInfo->reg[MT2063_REG_VGA_GAIN] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_VGA_GAIN, val);\r
+ }\r
+ break;\r
+\r
+ case MT2063_VGAOI:\r
+ /* Set VGA bias current */\r
+ val = (pInfo->reg[MT2063_REG_RSVD_31] & (U8Data)~0x07) | (nValue & 0x07);\r
+ if( pInfo->reg[MT2063_REG_RSVD_31] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_RSVD_31, val);\r
+ }\r
+ break;\r
+\r
+ case MT2063_TAGC:\r
+ /* Set TAGC */\r
+ val = (pInfo->reg[MT2063_REG_RSVD_1E] & (U8Data)~0x03) | (nValue & 0x03);\r
+ if( pInfo->reg[MT2063_REG_RSVD_1E] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_RSVD_1E, val);\r
+ }\r
+ break;\r
+\r
+ case MT2063_AMPGC:\r
+ /* Set Amp gain code */\r
+ val = (pInfo->reg[MT2063_REG_TEMP_SEL] & (U8Data)~0x03) | (nValue & 0x03);\r
+ if( pInfo->reg[MT2063_REG_TEMP_SEL] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_TEMP_SEL, val);\r
+ }\r
+ break;\r
+\r
+ /* Avoid DECT Frequencies */\r
+ case MT2063_AVOID_DECT:\r
+ {\r
+ enum MT2063_DECT_Avoid_Type newAvoidSetting = (enum MT2063_DECT_Avoid_Type) nValue;\r
+ if( (newAvoidSetting >= MT2063_NO_DECT_AVOIDANCE) && (newAvoidSetting <= MT2063_AVOID_BOTH) )\r
+ {\r
+ pInfo->AS_Data.avoidDECT = newAvoidSetting;\r
+ }\r
+ }\r
+ break;\r
+\r
+ /* Cleartune filter selection: 0 - by IC (default), 1 - by software */\r
+ case MT2063_CTFILT_SW:\r
+ pInfo->ctfilt_sw = (nValue & 0x01);\r
+ break;\r
+\r
+ /* These parameters are read-only */\r
+ case MT2063_IC_ADDR:\r
+ case MT2063_MAX_OPEN:\r
+ case MT2063_NUM_OPEN:\r
+ case MT2063_INPUT_FREQ:\r
+ case MT2063_IF1_ACTUAL:\r
+ case MT2063_IF1_CENTER:\r
+ case MT2063_IF1_BW:\r
+ case MT2063_AS_ALG:\r
+ case MT2063_EXCL_ZONES:\r
+ case MT2063_SPUR_AVOIDED:\r
+ case MT2063_NUM_SPURS:\r
+ case MT2063_SPUR_PRESENT:\r
+ case MT2063_ACLNA:\r
+ case MT2063_ACRF:\r
+ case MT2063_ACFIF:\r
+ case MT2063_EOP:\r
+ default:\r
+ status |= MT2063_ARG_RANGE;\r
+ }\r
+ }\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_SetPowerMaskBits\r
+**\r
+** Description: Sets the power-down mask bits for various sections of\r
+** the MT2063\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** Bits - Mask bits to be set.\r
+**\r
+** See definition of MT2063_Mask_Bits type for description\r
+** of each of the power bits.\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_COMM_ERR - Serial bus communications error\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_SetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status = MT2063_INV_HANDLE;\r
+ else\r
+ {\r
+ Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */\r
+ if ((Bits & 0xFF00) != 0)\r
+ {\r
+ pInfo->reg[MT2063_REG_PWR_2] |= (U8Data)((Bits & 0xFF00) >> 8);\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_PWR_2, &pInfo->reg[MT2063_REG_PWR_2], 1);\r
+ }\r
+ if ((Bits & 0xFF) != 0)\r
+ {\r
+ pInfo->reg[MT2063_REG_PWR_1] |= ((U8Data)Bits & 0xFF);\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_PWR_1, &pInfo->reg[MT2063_REG_PWR_1], 1);\r
+ }\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_ClearPowerMaskBits\r
+**\r
+** Description: Clears the power-down mask bits for various sections of\r
+** the MT2063\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** Bits - Mask bits to be cleared.\r
+**\r
+** See definition of MT2063_Mask_Bits type for description\r
+** of each of the power bits.\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_COMM_ERR - Serial bus communications error\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_ClearPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status = MT2063_INV_HANDLE;\r
+ else\r
+ {\r
+ Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */\r
+ if ((Bits & 0xFF00) != 0)\r
+ {\r
+ pInfo->reg[MT2063_REG_PWR_2] &= ~(U8Data)(Bits >> 8);\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_PWR_2, &pInfo->reg[MT2063_REG_PWR_2], 1);\r
+ }\r
+ if ((Bits & 0xFF) != 0)\r
+ {\r
+ pInfo->reg[MT2063_REG_PWR_1] &= ~(U8Data)(Bits & 0xFF);\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_PWR_1, &pInfo->reg[MT2063_REG_PWR_1], 1);\r
+ }\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_GetPowerMaskBits\r
+**\r
+** Description: Returns a mask of the enabled power shutdown bits\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** Bits - Mask bits to currently set.\r
+**\r
+** See definition of MT2063_Mask_Bits type for description\r
+** of each of the power bits.\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_ARG_NULL - Output argument is NULL\r
+** MT_COMM_ERR - Serial bus communications error\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_GetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits *Bits)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status = MT2063_INV_HANDLE;\r
+ else\r
+ {\r
+ if (Bits == NULL)\r
+ status |= MT2063_ARG_NULL;\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_PWR_1, &pInfo->reg[MT2063_REG_PWR_1], 2);\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ *Bits = (enum MT2063_Mask_Bits)(((SData_t)pInfo->reg[MT2063_REG_PWR_2] << 8) + pInfo->reg[MT2063_REG_PWR_1]);\r
+ *Bits = (enum MT2063_Mask_Bits)(*Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */\r
+ }\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_EnableExternalShutdown\r
+**\r
+** Description: Enables or disables the operation of the external\r
+** shutdown pin\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** Enabled - 0 = disable the pin, otherwise enable it\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_COMM_ERR - Serial bus communications error\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_EnableExternalShutdown(Handle_t h, U8Data Enabled)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status = MT2063_INV_HANDLE;\r
+ else\r
+ {\r
+ if (Enabled == 0)\r
+ pInfo->reg[MT2063_REG_PWR_1] &= ~0x08; /* Turn off the bit */\r
+ else\r
+ pInfo->reg[MT2063_REG_PWR_1] |= 0x08; /* Turn the bit on */\r
+\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_PWR_1, &pInfo->reg[MT2063_REG_PWR_1], 1);\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_SoftwareShutdown\r
+**\r
+** Description: Enables or disables software shutdown function. When\r
+** Shutdown==1, any section whose power mask is set will be\r
+** shutdown.\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** Shutdown - 1 = shutdown the masked sections, otherwise\r
+** power all sections on\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_COMM_ERR - Serial bus communications error\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+** 01-03-2008 PINZ Ver 1.xx: Added a trigger of BYPATNUP for\r
+** correct wakeup of the LNA\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_SoftwareShutdown(Handle_t h, U8Data Shutdown)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ {\r
+ status = MT2063_INV_HANDLE;\r
+ }\r
+ else\r
+ {\r
+ if (Shutdown == 1)\r
+ pInfo->reg[MT2063_REG_PWR_1] |= 0x04; /* Turn the bit on */\r
+ else\r
+ pInfo->reg[MT2063_REG_PWR_1] &= ~0x04; /* Turn off the bit */\r
+\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_PWR_1, &pInfo->reg[MT2063_REG_PWR_1], 1);\r
+ \r
+ if (Shutdown != 1)\r
+ {\r
+ pInfo->reg[MT2063_REG_BYP_CTRL] = (pInfo->reg[MT2063_REG_BYP_CTRL] & 0x9F) | 0x40;\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_BYP_CTRL, &pInfo->reg[MT2063_REG_BYP_CTRL], 1);\r
+ pInfo->reg[MT2063_REG_BYP_CTRL] = (pInfo->reg[MT2063_REG_BYP_CTRL] & 0x9F);\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_BYP_CTRL, &pInfo->reg[MT2063_REG_BYP_CTRL], 1);\r
+ }\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_SetExtSRO\r
+**\r
+** Description: Sets the external SRO driver.\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** Ext_SRO_Setting - external SRO drive setting\r
+**\r
+** (default) MT2063_EXT_SRO_OFF - ext driver off\r
+** MT2063_EXT_SRO_BY_1 - ext driver = SRO frequency\r
+** MT2063_EXT_SRO_BY_2 - ext driver = SRO/2 frequency\r
+** MT2063_EXT_SRO_BY_4 - ext driver = SRO/4 frequency\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** The Ext_SRO_Setting settings default to OFF\r
+** Use this function if you need to override the default\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+** 189 S 05-13-2008 RSK Ver 1.16: Correct location for ExtSRO control.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_SetExtSRO(Handle_t h,\r
+ enum MT2063_Ext_SRO Ext_SRO_Setting)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status = MT2063_INV_HANDLE;\r
+ else\r
+ {\r
+ pInfo->reg[MT2063_REG_CTRL_2C] = (pInfo->reg[MT2063_REG_CTRL_2C] & 0x3F) | ((U8Data)Ext_SRO_Setting << 6);\r
+ status = MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_CTRL_2C, &pInfo->reg[MT2063_REG_CTRL_2C], 1);\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_SetReg\r
+**\r
+** Description: Sets an MT2063 register.\r
+**\r
+** Parameters: h - Tuner handle (returned by MT2063_Open)\r
+** reg - MT2063 register/subaddress location\r
+** val - MT2063 register/subaddress value\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_ARG_RANGE - Argument out of range\r
+**\r
+** Dependencies: USERS MUST CALL MT2063_Open() FIRST!\r
+**\r
+** Use this function if you need to override a default\r
+** register value\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_SetReg(Handle_t h,\r
+ U8Data reg,\r
+ U8Data val)\r
+{\r
+ UData_t status = MT2063_OK; /* Status to be returned */\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ status |= MT2063_INV_HANDLE;\r
+\r
+ if (reg >= MT2063_REG_END_REGS)\r
+ status |= MT2063_ARG_RANGE;\r
+\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, reg, &val, 1);\r
+ if (MT2063_NO_ERROR(status))\r
+ pInfo->reg[reg] = val;\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+\r
+static UData_t MT2063_Round_fLO(UData_t f_LO, UData_t f_LO_Step, UData_t f_ref)\r
+{\r
+ return f_ref * (f_LO / f_ref)\r
+ + f_LO_Step * (((f_LO % f_ref) + (f_LO_Step / 2)) / f_LO_Step);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: fLO_FractionalTerm\r
+**\r
+** Description: Calculates the portion contributed by FracN / denom.\r
+**\r
+** This function preserves maximum precision without\r
+** risk of overflow. It accurately calculates\r
+** f_ref * num / denom to within 1 HZ with fixed math.\r
+**\r
+** Parameters: num - Fractional portion of the multiplier\r
+** denom - denominator portion of the ratio\r
+** This routine successfully handles denom values\r
+** up to and including 2^18.\r
+** f_Ref - SRO frequency. This calculation handles\r
+** f_ref as two separate 14-bit fields.\r
+** Therefore, a maximum value of 2^28-1\r
+** may safely be used for f_ref. This is\r
+** the genesis of the magic number "14" and the\r
+** magic mask value of 0x03FFF.\r
+**\r
+** Returns: f_ref * num / denom\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+static UData_t MT2063_fLO_FractionalTerm( UData_t f_ref,\r
+ UData_t num,\r
+ UData_t denom )\r
+{\r
+ UData_t t1 = (f_ref >> 14) * num;\r
+ UData_t term1 = t1 / denom;\r
+ UData_t loss = t1 % denom;\r
+ UData_t term2 = ( ((f_ref & 0x00003FFF) * num + (loss<<14)) + (denom/2) ) / denom;\r
+ return ((term1 << 14) + term2);\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: CalcLO1Mult\r
+**\r
+** Description: Calculates Integer divider value and the numerator\r
+** value for a FracN PLL.\r
+**\r
+** This function assumes that the f_LO and f_Ref are\r
+** evenly divisible by f_LO_Step.\r
+**\r
+** Parameters: Div - OUTPUT: Whole number portion of the multiplier\r
+** FracN - OUTPUT: Fractional portion of the multiplier\r
+** f_LO - desired LO frequency.\r
+** f_LO_Step - Minimum step size for the LO (in Hz).\r
+** f_Ref - SRO frequency.\r
+** f_Avoid - Range of PLL frequencies to avoid near\r
+** integer multiples of f_Ref (in Hz).\r
+**\r
+** Returns: Recalculated LO frequency.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+static UData_t MT2063_CalcLO1Mult(UData_t *Div,\r
+ UData_t *FracN,\r
+ UData_t f_LO,\r
+ UData_t f_LO_Step,\r
+ UData_t f_Ref)\r
+{\r
+ /* Calculate the whole number portion of the divider */\r
+ *Div = f_LO / f_Ref;\r
+\r
+ /* Calculate the numerator value (round to nearest f_LO_Step) */\r
+ *FracN = (64 * (((f_LO % f_Ref) + (f_LO_Step / 2)) / f_LO_Step) + (f_Ref / f_LO_Step / 2)) / (f_Ref / f_LO_Step);\r
+\r
+ return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm( f_Ref, *FracN, 64 );\r
+}\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: CalcLO2Mult\r
+**\r
+** Description: Calculates Integer divider value and the numerator\r
+** value for a FracN PLL.\r
+**\r
+** This function assumes that the f_LO and f_Ref are\r
+** evenly divisible by f_LO_Step.\r
+**\r
+** Parameters: Div - OUTPUT: Whole number portion of the multiplier\r
+** FracN - OUTPUT: Fractional portion of the multiplier\r
+** f_LO - desired LO frequency.\r
+** f_LO_Step - Minimum step size for the LO (in Hz).\r
+** f_Ref - SRO frequency.\r
+** f_Avoid - Range of PLL frequencies to avoid near\r
+** integer multiples of f_Ref (in Hz).\r
+**\r
+** Returns: Recalculated LO frequency.\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+**\r
+****************************************************************************/\r
+static UData_t MT2063_CalcLO2Mult(UData_t *Div,\r
+ UData_t *FracN,\r
+ UData_t f_LO,\r
+ UData_t f_LO_Step,\r
+ UData_t f_Ref)\r
+{\r
+ /* Calculate the whole number portion of the divider */\r
+ *Div = f_LO / f_Ref;\r
+\r
+ /* Calculate the numerator value (round to nearest f_LO_Step) */\r
+ *FracN = (8191 * (((f_LO % f_Ref) + (f_LO_Step / 2)) / f_LO_Step) + (f_Ref / f_LO_Step / 2)) / (f_Ref / f_LO_Step);\r
+\r
+ return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm( f_Ref, *FracN, 8191 );\r
+}\r
+\r
+/****************************************************************************\r
+**\r
+** Name: FindClearTuneFilter\r
+**\r
+** Description: Calculate the corrrect ClearTune filter to be used for\r
+** a given input frequency.\r
+**\r
+** Parameters: pInfo - ptr to tuner data structure\r
+** f_in - RF input center frequency (in Hz).\r
+**\r
+** Returns: ClearTune filter number (0-31)\r
+**\r
+** Dependencies: MUST CALL MT2064_Open BEFORE FindClearTuneFilter!\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 04-10-2008 PINZ Ver 1.14: Use software-controlled ClearTune\r
+** cross-over frequency values.\r
+**\r
+****************************************************************************/\r
+static UData_t FindClearTuneFilter(struct MT2063_Info_t* pInfo, UData_t f_in)\r
+{\r
+ UData_t RFBand;\r
+ UData_t idx; /* index loop */\r
+\r
+ /*\r
+ ** Find RF Band setting\r
+ */\r
+ RFBand = 31; /* def when f_in > all */\r
+ for (idx=0; idx<31; ++idx)\r
+ {\r
+ if (pInfo->CTFiltMax[idx] >= f_in)\r
+ {\r
+ RFBand = idx;\r
+ break;\r
+ }\r
+ }\r
+ return (RFBand);\r
+}\r
+\r
+\r
+\r
+/****************************************************************************\r
+**\r
+** Name: MT2063_Tune\r
+**\r
+** Description: Change the tuner's tuned frequency to RFin.\r
+**\r
+** Parameters: h - Open handle to the tuner (from MT2063_Open).\r
+** f_in - RF input center frequency (in Hz).\r
+**\r
+** Returns: status:\r
+** MT_OK - No errors\r
+** MT_INV_HANDLE - Invalid tuner handle\r
+** MT_UPC_UNLOCK - Upconverter PLL unlocked\r
+** MT_DNC_UNLOCK - Downconverter PLL unlocked\r
+** MT_COMM_ERR - Serial bus communications error\r
+** MT_SPUR_CNT_MASK - Count of avoided LO spurs\r
+** MT_SPUR_PRESENT - LO spur possible in output\r
+** MT_FIN_RANGE - Input freq out of range\r
+** MT_FOUT_RANGE - Output freq out of range\r
+** MT_UPC_RANGE - Upconverter freq out of range\r
+** MT_DNC_RANGE - Downconverter freq out of range\r
+**\r
+** Dependencies: MUST CALL MT2063_Open BEFORE MT2063_Tune!\r
+**\r
+** MT_ReadSub - Read data from the two-wire serial bus\r
+** MT_WriteSub - Write data to the two-wire serial bus\r
+** MT_Sleep - Delay execution for x milliseconds\r
+** MT2063_GetLocked - Checks to see if LO1 and LO2 are locked\r
+**\r
+** Revision History:\r
+**\r
+** SCR Date Author Description\r
+** -------------------------------------------------------------------------\r
+** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.\r
+** 04-10-2008 PINZ Ver 1.05: Use software-controlled ClearTune\r
+** cross-over frequency values.\r
+** 175 I 16-06-2008 PINZ Ver 1.16: Add control to avoid US DECT freqs.\r
+** 175 I 06-19-2008 RSK Ver 1.17: Refactor DECT control to SpurAvoid.\r
+** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW\r
+**\r
+****************************************************************************/\r
+UData_t MT2063_Tune(Handle_t h,\r
+ UData_t f_in) /* RF input center frequency */\r
+{\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+\r
+ UData_t status = MT2063_OK; /* status of operation */\r
+ UData_t LO1; /* 1st LO register value */\r
+ UData_t Num1; /* Numerator for LO1 reg. value */\r
+ UData_t f_IF1; /* 1st IF requested */\r
+ UData_t LO2; /* 2nd LO register value */\r
+ UData_t Num2; /* Numerator for LO2 reg. value */\r
+ UData_t ofLO1, ofLO2; /* last time's LO frequencies */\r
+ UData_t ofin, ofout; /* last time's I/O frequencies */\r
+ U8Data fiffc = 0x80; /* FIFF center freq from tuner */\r
+ UData_t fiffof; /* Offset from FIFF center freq */\r
+ const U8Data LO1LK = 0x80; /* Mask for LO1 Lock bit */\r
+ U8Data LO2LK = 0x08; /* Mask for LO2 Lock bit */\r
+ U8Data val;\r
+ UData_t RFBand;\r
+\r
+ /* Verify that the handle passed points to a valid tuner */\r
+ if (MT2063_IsValidHandle(pInfo) == 0)\r
+ return MT2063_INV_HANDLE;\r
+\r
+ /* Check the input and output frequency ranges */\r
+ if ((f_in < MT2063_MIN_FIN_FREQ) || (f_in > MT2063_MAX_FIN_FREQ))\r
+ status |= MT2063_FIN_RANGE;\r
+\r
+ if ((pInfo->AS_Data.f_out < MT2063_MIN_FOUT_FREQ) || (pInfo->AS_Data.f_out > MT2063_MAX_FOUT_FREQ))\r
+ status |= MT2063_FOUT_RANGE;\r
+ \r
+ /*\r
+ ** Save original LO1 and LO2 register values\r
+ */\r
+ ofLO1 = pInfo->AS_Data.f_LO1;\r
+ ofLO2 = pInfo->AS_Data.f_LO2;\r
+ ofin = pInfo->AS_Data.f_in;\r
+ ofout = pInfo->AS_Data.f_out;\r
+\r
+ /*\r
+ ** Find and set RF Band setting\r
+ */\r
+ if (pInfo->ctfilt_sw == 1)\r
+ {\r
+ val = ( pInfo->reg[MT2063_REG_CTUNE_CTRL] | 0x08 );\r
+ if( pInfo->reg[MT2063_REG_CTUNE_CTRL] != val )\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_CTUNE_CTRL, val);\r
+ }\r
+ val = pInfo->reg[MT2063_REG_CTUNE_OV];\r
+ RFBand = FindClearTuneFilter(pInfo, f_in);\r
+ pInfo->reg[MT2063_REG_CTUNE_OV] = (U8Data)((pInfo->reg[MT2063_REG_CTUNE_OV] & ~0x1F)\r
+ | RFBand);\r
+ if (pInfo->reg[MT2063_REG_CTUNE_OV] != val)\r
+ {\r
+ status |= MT2063_SetReg(pInfo, MT2063_REG_CTUNE_OV, val);\r
+ }\r
+ }\r
+\r
+ /*\r
+ ** Read the FIFF Center Frequency from the tuner\r
+ */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_ReadSub(pInfo->hUserData, pInfo->address, MT2063_REG_FIFFC, &pInfo->reg[MT2063_REG_FIFFC], 1);\r
+ fiffc = pInfo->reg[MT2063_REG_FIFFC];\r
+ }\r
+ /*\r
+ ** Assign in the requested values\r
+ */\r
+ pInfo->AS_Data.f_in = f_in;\r
+ /* Request a 1st IF such that LO1 is on a step size */\r
+ pInfo->AS_Data.f_if1_Request = MT2063_Round_fLO(pInfo->AS_Data.f_if1_Request + f_in, pInfo->AS_Data.f_LO1_Step, pInfo->AS_Data.f_ref) - f_in;\r
+\r
+ /*\r
+ ** Calculate frequency settings. f_IF1_FREQ + f_in is the\r
+ ** desired LO1 frequency\r
+ */\r
+ MT2063_ResetExclZones(&pInfo->AS_Data);\r
+ \r
+ f_IF1 = MT2063_ChooseFirstIF(&pInfo->AS_Data);\r
+ \r
+ pInfo->AS_Data.f_LO1 = MT2063_Round_fLO(f_IF1 + f_in, pInfo->AS_Data.f_LO1_Step, pInfo->AS_Data.f_ref);\r
+ \r
+ pInfo->AS_Data.f_LO2 = MT2063_Round_fLO(pInfo->AS_Data.f_LO1 - pInfo->AS_Data.f_out - f_in, pInfo->AS_Data.f_LO2_Step, pInfo->AS_Data.f_ref);\r
+ \r
+ /*\r
+ ** Check for any LO spurs in the output bandwidth and adjust\r
+ ** the LO settings to avoid them if needed\r
+ */\r
+ status |= MT2063_AvoidSpurs(h, &pInfo->AS_Data);\r
+ /*\r
+ ** MT_AvoidSpurs spurs may have changed the LO1 & LO2 values.\r
+ ** Recalculate the LO frequencies and the values to be placed\r
+ ** in the tuning registers.\r
+ */\r
+ pInfo->AS_Data.f_LO1 = MT2063_CalcLO1Mult(&LO1, &Num1, pInfo->AS_Data.f_LO1, pInfo->AS_Data.f_LO1_Step, pInfo->AS_Data.f_ref);\r
+ pInfo->AS_Data.f_LO2 = MT2063_Round_fLO(pInfo->AS_Data.f_LO1 - pInfo->AS_Data.f_out - f_in, pInfo->AS_Data.f_LO2_Step, pInfo->AS_Data.f_ref);\r
+ pInfo->AS_Data.f_LO2 = MT2063_CalcLO2Mult(&LO2, &Num2, pInfo->AS_Data.f_LO2, pInfo->AS_Data.f_LO2_Step, pInfo->AS_Data.f_ref);\r
+\r
+ \r
+ /*\r
+ ** Check the upconverter and downconverter frequency ranges\r
+ */\r
+ if ((pInfo->AS_Data.f_LO1 < MT2063_MIN_UPC_FREQ) || (pInfo->AS_Data.f_LO1 > MT2063_MAX_UPC_FREQ))\r
+ status |= MT2063_UPC_RANGE;\r
+ if ((pInfo->AS_Data.f_LO2 < MT2063_MIN_DNC_FREQ) || (pInfo->AS_Data.f_LO2 > MT2063_MAX_DNC_FREQ))\r
+ status |= MT2063_DNC_RANGE;\r
+ /* LO2 Lock bit was in a different place for B0 version */\r
+ if (pInfo->tuner_id == MT2063_B0)\r
+ LO2LK = 0x40;\r
+\r
+ /*\r
+ ** If we have the same LO frequencies and we're already locked,\r
+ ** then skip re-programming the LO registers.\r
+ */\r
+ if ((ofLO1 != pInfo->AS_Data.f_LO1)\r
+ || (ofLO2 != pInfo->AS_Data.f_LO2)\r
+ || ((pInfo->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) != (LO1LK | LO2LK)))\r
+ {\r
+ /*\r
+ ** Calculate the FIFFOF register value\r
+ **\r
+ ** IF1_Actual\r
+ ** FIFFOF = ------------ - 8 * FIFFC - 4992\r
+ ** f_ref/64\r
+ */\r
+ fiffof = (pInfo->AS_Data.f_LO1 - f_in) / (pInfo->AS_Data.f_ref / 64) - 8 * (UData_t)fiffc - 4992;\r
+ if (fiffof > 0xFF)\r
+ fiffof = 0xFF;\r
+\r
+ /*\r
+ ** Place all of the calculated values into the local tuner\r
+ ** register fields.\r
+ */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ pInfo->reg[MT2063_REG_LO1CQ_1] = (U8Data)(LO1 & 0xFF); /* DIV1q */\r
+ pInfo->reg[MT2063_REG_LO1CQ_2] = (U8Data)(Num1 & 0x3F); /* NUM1q */\r
+ pInfo->reg[MT2063_REG_LO2CQ_1] = (U8Data)(((LO2 & 0x7F) << 1) /* DIV2q */\r
+ | (Num2 >> 12)); /* NUM2q (hi) */\r
+ pInfo->reg[MT2063_REG_LO2CQ_2] = (U8Data)((Num2 & 0x0FF0) >> 4); /* NUM2q (mid) */\r
+ pInfo->reg[MT2063_REG_LO2CQ_3] = (U8Data)(0xE0 | (Num2 & 0x000F)); /* NUM2q (lo) */\r
+\r
+ /*\r
+ ** Now write out the computed register values\r
+ ** IMPORTANT: There is a required order for writing\r
+ ** (0x05 must follow all the others).\r
+ */\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO1CQ_1, &pInfo->reg[MT2063_REG_LO1CQ_1], 5); /* 0x01 - 0x05 */\r
+ if (pInfo->tuner_id == MT2063_B0)\r
+ {\r
+ /* Re-write the one-shot bits to trigger the tune operation */\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_LO2CQ_3, &pInfo->reg[MT2063_REG_LO2CQ_3], 1); /* 0x05 */\r
+ }\r
+ /* Write out the FIFF offset only if it's changing */\r
+ if (pInfo->reg[MT2063_REG_FIFF_OFFSET] != (U8Data)fiffof)\r
+ {\r
+ pInfo->reg[MT2063_REG_FIFF_OFFSET] = (U8Data)fiffof;\r
+ status |= MT2063_WriteSub(pInfo->hUserData, pInfo->address, MT2063_REG_FIFF_OFFSET, &pInfo->reg[MT2063_REG_FIFF_OFFSET], 1);\r
+ }\r
+ }\r
+\r
+ /*\r
+ ** Check for LO's locking\r
+ */\r
+\r
+ \r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ status |= MT2063_GetLocked(h);\r
+ }\r
+ /*\r
+ ** If we locked OK, assign calculated data to MT2063_Info_t structure\r
+ */\r
+ if (MT2063_NO_ERROR(status))\r
+ {\r
+ pInfo->f_IF1_actual = pInfo->AS_Data.f_LO1 - f_in;\r
+ }\r
+ }\r
+\r
+ return (status);\r
+}\r
+\r
+UData_t MT_Tune_atv(Handle_t h, UData_t f_in, UData_t bw_in, enum MTTune_atv_standard tv_type) \r
+{\r
+\r
+ UData_t status = MT2063_OK;\r
+ struct MT2063_Info_t* pInfo = (struct MT2063_Info_t*) h;\r
+ struct dvb_frontend *fe = (struct dvb_frontend *)pInfo->hUserData;\r
+ struct mt2063_state *state = fe->tuner_priv;\r
+\r
+ SData_t pict_car = 0;\r
+ SData_t pict2chanb_vsb = 0;\r
+ SData_t pict2chanb_snd = 0;\r
+ SData_t pict2snd1 = 0;\r
+ SData_t pict2snd2 = 0;\r
+ SData_t ch_bw = 0;\r
+\r
+ SData_t if_mid = 0;\r
+ SData_t rcvr_mode =0;\r
+ UData_t mode_get =0;\r
+\r
+ \r
+ switch (tv_type) {\r
+ case MTTUNEA_PAL_B : {\r
+ pict_car = 38900000;\r
+ ch_bw = 8000000;\r
+ pict2chanb_vsb = -1250000; \r
+ pict2snd1 = 5500000;\r
+ pict2snd2 = 5742000;\r
+ rcvr_mode =1;\r
+ break;\r
+ }\r
+ case MTTUNEA_PAL_G : {\r
+ pict_car = 38900000;\r
+ ch_bw = 7000000;\r
+ pict2chanb_vsb = -1250000; \r
+ pict2snd1 = 5500000;\r
+ pict2snd2 = 0;\r
+ rcvr_mode =1;\r
+ break;\r
+ }\r
+ case MTTUNEA_PAL_I : {\r
+ pict_car = 38900000;\r
+ ch_bw = 8000000;\r
+ pict2chanb_vsb = -1250000; \r
+ pict2snd1 = 6000000;\r
+ pict2snd2 = 0;\r
+ rcvr_mode =1;\r
+ break;\r
+ }\r
+ case MTTUNEA_PAL_L : {\r
+ pict_car = 38900000;\r
+ ch_bw = 8000000;\r
+ pict2chanb_vsb = -1250000; \r
+ pict2snd1 = 6500000;\r
+ pict2snd2 = 0;\r
+ rcvr_mode =1;\r
+ break;\r
+ }\r
+ case MTTUNEA_PAL_MN : {\r
+ pict_car = 38900000;\r
+ ch_bw = 6000000;\r
+ pict2chanb_vsb = -1250000; \r
+ pict2snd1 = 4500000;\r
+ pict2snd2 = 0;\r
+ rcvr_mode =1;\r
+ break;\r
+ }\r
+ case MTTUNEA_PAL_DK : {\r
+ pict_car = 38900000;\r
+ ch_bw = 8000000;\r
+ pict2chanb_vsb = -1250000; \r
+ pict2snd1 = 6500000;\r
+ pict2snd2 = 0;\r
+ rcvr_mode =1;\r
+ break;\r
+ }\r
+ case MTTUNEA_DIGITAL : {\r
+ pict_car = 36125000;\r
+ ch_bw = 8000000;\r
+ pict2chanb_vsb = -(ch_bw/2); \r
+ pict2snd1 = 0;\r
+ pict2snd2 = 0;\r
+ rcvr_mode = 2;\r
+ break;\r
+ }\r
+ case MTTUNEA_FMRADIO : {\r
+ pict_car = 38900000;\r
+ ch_bw = 8000000; \r
+ pict2chanb_vsb = -(ch_bw/2); \r
+ pict2snd1 = 0;\r
+ pict2snd2 = 0;\r
+ rcvr_mode =4;\r
+ //f_in -= 2900000;\r
+ break;\r
+ }\r
+ case MTTUNEA_DVBC : {\r
+ pict_car = 36125000;\r
+ ch_bw = 8000000;\r
+ pict2chanb_vsb = -(ch_bw/2); \r
+ pict2snd1 = 0;\r
+ pict2snd2 = 0;\r
+ rcvr_mode = MT2063_CABLE_QAM;\r
+ break;\r
+ } \r
+ case MTTUNEA_DVBT : {\r
+ pict_car = 36125000;\r
+ ch_bw = bw_in;//8000000\r
+ pict2chanb_vsb = -(ch_bw/2); \r
+ pict2snd1 = 0;\r
+ pict2snd2 = 0;\r
+ rcvr_mode = MT2063_OFFAIR_COFDM;\r
+ break;\r
+ }\r
+ case MTTUNEA_UNKNOWN : break;\r
+ default : break;\r
+ }\r
+\r
+ pict2chanb_snd = pict2chanb_vsb - ch_bw;\r
+ if_mid = pict_car - (pict2chanb_vsb + (ch_bw/2) );\r
+\r
+ status |= MT2063_SetParam(h,MT2063_STEPSIZE,125000);\r
+ status |= MT2063_SetParam(h,MT2063_OUTPUT_FREQ,if_mid);\r
+ status |= MT2063_SetParam(h,MT2063_OUTPUT_BW,ch_bw);\r
+ status |=MT2063_GetParam(h,MT2063_RCVR_MODE,&mode_get);\r
+ \r
+ status |= MT2063_SetParam(h,MT2063_RCVR_MODE,rcvr_mode);\r
+ status |= MT2063_Tune(h,( f_in + (pict2chanb_vsb + (ch_bw/2) ) ) );\r
+ status |=MT2063_GetParam(h,MT2063_RCVR_MODE,&mode_get);\r
+ \r
+ return (UData_t)status;\r
+} \r
+\r
+\r
+static int mt2063_init(struct dvb_frontend *fe)\r
+{\r
+ UData_t status = MT2063_ERROR;\r
+ struct mt2063_state *state = fe->tuner_priv;\r
+\r
+ status = MT2063_Open(0xC0, &(state->MT2063_ht), fe);\r
+ status |= MT2063_SoftwareShutdown(state->MT2063_ht, 1);\r
+ status |= MT2063_ClearPowerMaskBits(state->MT2063_ht, MT2063_ALL_SD); \r
+\r
+ if(MT2063_OK != status)\r
+ {\r
+ printk("%s %d error status = 0x%x!!\n", __func__, __LINE__, status);\r
+ return -1;\r
+ }\r
+\r
+ return 0;\r
+}\r
+\r
+static int mt2063_sleep(struct dvb_frontend *fe)\r
+{
+ /* TODO: power down */
+ return 0;
+}
+\r
+static int mt2063_get_status(struct dvb_frontend *fe, u32 *status)\r
+{
+ int rc = 0;\r
+ \r
+ //get tuner lock status\r
+ \r
+ return rc;\r
+}
+\r
+\r
+static int mt2063_get_state(struct dvb_frontend *fe,\r
+ enum tuner_param param,
+ struct tuner_state *state)
+{\r
+ struct mt2063_state *mt2063State = fe->tuner_priv;\r
+ \r
+ switch (param) {
+ case DVBFE_TUNER_FREQUENCY:
+ //get frequency\r
+ break;
+ case DVBFE_TUNER_TUNERSTEP:
+ break;
+ case DVBFE_TUNER_IFFREQ:
+ break;
+ case DVBFE_TUNER_BANDWIDTH:
+ //get bandwidth\r
+ break;
+ case DVBFE_TUNER_REFCLOCK: \r
+ state->refclock = (u32_t)MT2063_GetLocked((Handle_t)(mt2063State->MT2063_ht));\r
+ break;
+ default:
+ break;
+ }
+
+ return (int)state->refclock;\r
+}\r
+\r
+static int mt2063_set_state(struct dvb_frontend *fe,\r
+ enum tuner_param param,
+ struct tuner_state *state)
+{
+ struct mt2063_state *mt2063State = fe->tuner_priv;\r
+ UData_t status = MT2063_OK;\r
+ \r
+ switch (param) {
+ case DVBFE_TUNER_FREQUENCY:
+ //set frequency\r
+\r
+ status = MT_Tune_atv((Handle_t)(mt2063State->MT2063_ht), state->frequency, state->bandwidth, mt2063State->tv_type);\r
+ \r
+ mt2063State->frequency = state->frequency;\r
+ break;
+ case DVBFE_TUNER_TUNERSTEP:
+ break;
+ case DVBFE_TUNER_IFFREQ:
+ break;
+ case DVBFE_TUNER_BANDWIDTH:
+ //set bandwidth\r
+ mt2063State->bandwidth = state->bandwidth;\r
+ break;
+ case DVBFE_TUNER_REFCLOCK:\r
+ \r
+ break;\r
+ case DVBFE_TUNER_OPEN:\r
+ status = MT2063_Open(MT2063_I2C, &(mt2063State->MT2063_ht), fe);\r
+ break;\r
+ case DVBFE_TUNER_SOFTWARE_SHUTDOWN:\r
+ status = MT2063_SoftwareShutdown(mt2063State->MT2063_ht, 1);\r
+ break;\r
+ case DVBFE_TUNER_CLEAR_POWER_MASKBITS:\r
+ status = MT2063_ClearPowerMaskBits(mt2063State->MT2063_ht, MT2063_ALL_SD);\r
+ break;\r
+ default:
+ break;
+ }
+
+ return (int)status;\r
+}\r
+\r
+static int mt2063_release(struct dvb_frontend *fe)\r
+{
+ struct mt2063_state *state = fe->tuner_priv;\r
+
+ fe->tuner_priv = NULL;
+ kfree(state);
+
+ return 0;
+}\r
+\r
+static struct dvb_tuner_ops mt2063_ops = {\r
+ .info = {
+ .name = "MT2063 Silicon Tuner",\r
+ .frequency_min = 45000000,\r
+ .frequency_max = 850000000,\r
+ .frequency_step = 0,
+ },
+
+ .init = mt2063_init,\r
+ .sleep = mt2063_sleep,\r
+ .get_status = mt2063_get_status,\r
+ .get_state = mt2063_get_state,\r
+ .set_state = mt2063_set_state,\r
+ .release = mt2063_release\r
+};
+
+struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe,\r
+ struct mt2063_config *config,\r
+ struct i2c_adapter *i2c)
+{
+ struct mt2063_state *state = NULL;\r
+
+ state = kzalloc(sizeof (struct mt2063_state), GFP_KERNEL);\r
+ if (state == NULL)
+ goto error;
+
+ state->config = config;
+ state->i2c = i2c;
+ state->frontend = fe;
+ state->reference = config->refclock / 1000; /* kHz */\r
+ state->MT2063_init = FALSE;\r
+ fe->tuner_priv = state;
+ fe->ops.tuner_ops = mt2063_ops;\r
+
+ printk("%s: Attaching MT2063 \n", __func__);\r
+ return fe;
+
+error:
+ kfree(state);
+ return NULL;
+}
+
+\r
+
+EXPORT_SYMBOL(mt2063_attach);\r
+MODULE_PARM_DESC(verbose, "Set Verbosity level");
+
+MODULE_AUTHOR("Henry");\r
+MODULE_DESCRIPTION("MT2063 Silicon tuner");\r
+MODULE_LICENSE("GPL");\r
+\r
+\r
+\r
projects / GitHub / LineageOS / G12 / android_kernel_amlogic_linux-4.9.git / commitdiff