drm/amdgpu: move the ring type into the funcs structure (v2)

It's constant, so it doesn't make to much sense to keep it
with the variable data.

v2: update vce and uvd phys mode ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index a13e551e67cf6f459e013ff55327423922a30139..04b7aaf770e41a821946cea4321e9e2c8aca701f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -942,8 +942,8 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
 
        /* UVD & VCE fw doesn't support user fences */
        if (parser->job->uf_addr && (
-           parser->job->ring->type == AMDGPU_RING_TYPE_UVD ||
-           parser->job->ring->type == AMDGPU_RING_TYPE_VCE))
+           parser->job->ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
+           parser->job->ring->funcs->type == AMDGPU_RING_TYPE_VCE))
                return -EINVAL;
 
        return 0;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 3cb5e903cd62896529d2ea18d5ea7f49c2feae73..b81b1244a12051974a837f5c15c13a35a5f20180 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -164,8 +164,7 @@ void amdgpu_ring_undo(struct amdgpu_ring *ring)
  */
 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
                     unsigned max_dw, u32 nop, u32 align_mask,
-                    struct amdgpu_irq_src *irq_src, unsigned irq_type,
-                    enum amdgpu_ring_type ring_type)
+                    struct amdgpu_irq_src *irq_src, unsigned irq_type)
 {
        int r;
 
@@ -218,7 +217,6 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
                                             amdgpu_sched_hw_submission);
        ring->align_mask = align_mask;
        ring->nop = nop;
-       ring->type = ring_type;
 
        /* Allocate ring buffer */
        if (ring->ring_obj == NULL) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 767843c2b1d716bb067dc4964f05881cc1e1549d..6cf89c97ef8e0d18c11ca21fb51b5be1d2081b1e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -92,6 +92,8 @@ unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
 
 /* provided by hw blocks that expose a ring buffer for commands */
 struct amdgpu_ring_funcs {
+       enum amdgpu_ring_type   type;
+
        /* ring read/write ptr handling */
        u32 (*get_rptr)(struct amdgpu_ring *ring);
        u32 (*get_wptr)(struct amdgpu_ring *ring);
@@ -161,7 +163,6 @@ struct amdgpu_ring {
        unsigned                wptr_offs;
        unsigned                fence_offs;
        uint64_t                current_ctx;
-       enum amdgpu_ring_type   type;
        char                    name[16];
        unsigned                cond_exe_offs;
        u64                     cond_exe_gpu_addr;
@@ -178,8 +179,7 @@ void amdgpu_ring_commit(struct amdgpu_ring *ring);
 void amdgpu_ring_undo(struct amdgpu_ring *ring);
 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
                     unsigned ring_size, u32 nop, u32 align_mask,
-                    struct amdgpu_irq_src *irq_src, unsigned irq_type,
-                    enum amdgpu_ring_type ring_type);
+                    struct amdgpu_irq_src *irq_src, unsigned irq_type);
 void amdgpu_ring_fini(struct amdgpu_ring *ring);
 
 #endif

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index b8620d3dd61ef375888dc3edba37ea9e46fd44b5..da66823eff1c9962c55c562da242db9f903b5200 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -348,7 +348,7 @@ static bool amdgpu_vm_ring_has_compute_vm_bug(struct amdgpu_ring *ring)
        struct amdgpu_device *adev = ring->adev;
        const struct amdgpu_ip_block_version *ip_block;
 
-       if (ring->type != AMDGPU_RING_TYPE_COMPUTE)
+       if (ring->funcs->type != AMDGPU_RING_TYPE_COMPUTE)
                /* only compute rings */
                return false;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index 49b34decce586f1e9cbc3fe32c9b87c9f1d401ee..472cfff28ccf07129e3e9f79f56d6180e69cbd63 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
@@ -946,8 +946,8 @@ static int cik_sdma_sw_init(void *handle)
                                     SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0), 0xf,
                                     &adev->sdma.trap_irq,
                                     (i == 0) ?
-                                    AMDGPU_SDMA_IRQ_TRAP0 : AMDGPU_SDMA_IRQ_TRAP1,
-                                    AMDGPU_RING_TYPE_SDMA);
+                                    AMDGPU_SDMA_IRQ_TRAP0 :
+                                    AMDGPU_SDMA_IRQ_TRAP1);
                if (r)
                        return r;
        }
@@ -1209,6 +1209,7 @@ const struct amd_ip_funcs cik_sdma_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = {
+       .type = AMDGPU_RING_TYPE_SDMA,
        .get_rptr = cik_sdma_ring_get_rptr,
        .get_wptr = cik_sdma_ring_get_wptr,
        .set_wptr = cik_sdma_ring_set_wptr,

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index a86b17944bcfcbb68a7b45d9ce1ef3a60e170c6a..1f8687fd8662d8d9619719bfa58bba1357dd8312 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -1940,7 +1940,7 @@ static int gfx_v6_0_cp_resume(struct amdgpu_device *adev)
 
 static void gfx_v6_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
 {
-       int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
+       int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
        uint32_t seq = ring->fence_drv.sync_seq;
        uint64_t addr = ring->fence_drv.gpu_addr;
 
@@ -1966,7 +1966,7 @@ static void gfx_v6_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
 static void gfx_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
                                        unsigned vm_id, uint64_t pd_addr)
 {
-       int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
+       int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
 
        /* write new base address */
        amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
@@ -2870,8 +2870,7 @@ static int gfx_v6_0_sw_init(void *handle)
                sprintf(ring->name, "gfx");
                r = amdgpu_ring_init(adev, ring, 1024,
                                     0x80000000, 0xff,
-                                    &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP,
-                                    AMDGPU_RING_TYPE_GFX);
+                                    &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
                if (r)
                        return r;
        }
@@ -2894,8 +2893,7 @@ static int gfx_v6_0_sw_init(void *handle)
                irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe;
                r = amdgpu_ring_init(adev, ring, 1024,
                                     0x80000000, 0xff,
-                                    &adev->gfx.eop_irq, irq_type,
-                                    AMDGPU_RING_TYPE_COMPUTE);
+                                    &adev->gfx.eop_irq, irq_type);
                if (r)
                        return r;
        }
@@ -3228,6 +3226,7 @@ const struct amd_ip_funcs gfx_v6_0_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
+       .type = AMDGPU_RING_TYPE_GFX,
        .get_rptr = gfx_v6_0_ring_get_rptr,
        .get_wptr = gfx_v6_0_ring_get_wptr,
        .set_wptr = gfx_v6_0_ring_set_wptr_gfx,
@@ -3252,6 +3251,7 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
 };
 
 static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = {
+       .type = AMDGPU_RING_TYPE_COMPUTE,
        .get_rptr = gfx_v6_0_ring_get_rptr,
        .get_wptr = gfx_v6_0_ring_get_wptr,
        .set_wptr = gfx_v6_0_ring_set_wptr_compute,

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index f2415f58c160222eac90cea1a930009f9bf78429..cb2fc826f95c7ab18dcc443db76319362ea2be3c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2077,9 +2077,9 @@ static int gfx_v7_0_ring_test_ring(struct amdgpu_ring *ring)
 static void gfx_v7_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
 {
        u32 ref_and_mask;
-       int usepfp = ring->type == AMDGPU_RING_TYPE_COMPUTE ? 0 : 1;
+       int usepfp = ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE ? 0 : 1;
 
-       if (ring->type == AMDGPU_RING_TYPE_COMPUTE) {
+       if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {
                switch (ring->me) {
                case 1:
                        ref_and_mask = GPU_HDP_FLUSH_DONE__CP2_MASK << ring->pipe;
@@ -3222,7 +3222,7 @@ static int gfx_v7_0_cp_resume(struct amdgpu_device *adev)
  */
 static void gfx_v7_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
 {
-       int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
+       int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
        uint32_t seq = ring->fence_drv.sync_seq;
        uint64_t addr = ring->fence_drv.gpu_addr;
 
@@ -3262,7 +3262,7 @@ static void gfx_v7_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
 static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
                                        unsigned vm_id, uint64_t pd_addr)
 {
-       int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
+       int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
 
        amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
        amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |
@@ -4612,8 +4612,7 @@ static int gfx_v7_0_sw_init(void *handle)
                sprintf(ring->name, "gfx");
                r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xff,
-                                    &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP,
-                                    AMDGPU_RING_TYPE_GFX);
+                                    &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
                if (r)
                        return r;
        }
@@ -4639,8 +4638,7 @@ static int gfx_v7_0_sw_init(void *handle)
                /* type-2 packets are deprecated on MEC, use type-3 instead */
                r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xff,
-                                    &adev->gfx.eop_irq, irq_type,
-                                    AMDGPU_RING_TYPE_COMPUTE);
+                                    &adev->gfx.eop_irq, irq_type);
                if (r)
                        return r;
        }
@@ -5109,6 +5107,7 @@ const struct amd_ip_funcs gfx_v7_0_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = {
+       .type = AMDGPU_RING_TYPE_GFX,
        .get_rptr = gfx_v7_0_ring_get_rptr,
        .get_wptr = gfx_v7_0_ring_get_wptr_gfx,
        .set_wptr = gfx_v7_0_ring_set_wptr_gfx,
@@ -5136,6 +5135,7 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = {
 };
 
 static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = {
+       .type = AMDGPU_RING_TYPE_COMPUTE,
        .get_rptr = gfx_v7_0_ring_get_rptr,
        .get_wptr = gfx_v7_0_ring_get_wptr_compute,
        .set_wptr = gfx_v7_0_ring_set_wptr_compute,

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index e3330d06af9a29b59f3046701de95eb52e2b75d9..637dbc1a2e48e9969f4dfa5d802bf1c887e5539b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -2036,8 +2036,7 @@ static int gfx_v8_0_sw_init(void *handle)
 
                r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xff,
-                                    &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP,
-                                    AMDGPU_RING_TYPE_GFX);
+                                    &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
                if (r)
                        return r;
        }
@@ -2063,8 +2062,7 @@ static int gfx_v8_0_sw_init(void *handle)
                /* type-2 packets are deprecated on MEC, use type-3 instead */
                r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xff,
-                                    &adev->gfx.eop_irq, irq_type,
-                                    AMDGPU_RING_TYPE_COMPUTE);
+                                    &adev->gfx.eop_irq, irq_type);
                if (r)
                        return r;
        }
@@ -6127,7 +6125,7 @@ static void gfx_v8_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
 {
        u32 ref_and_mask, reg_mem_engine;
 
-       if (ring->type == AMDGPU_RING_TYPE_COMPUTE) {
+       if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {
                switch (ring->me) {
                case 1:
                        ref_and_mask = GPU_HDP_FLUSH_DONE__CP2_MASK << ring->pipe;
@@ -6229,7 +6227,7 @@ static void gfx_v8_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr,
 
 static void gfx_v8_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
 {
-       int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
+       int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
        uint32_t seq = ring->fence_drv.sync_seq;
        uint64_t addr = ring->fence_drv.gpu_addr;
 
@@ -6247,7 +6245,7 @@ static void gfx_v8_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
 static void gfx_v8_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
                                        unsigned vm_id, uint64_t pd_addr)
 {
-       int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
+       int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
 
        amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
        amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |
@@ -6529,6 +6527,7 @@ const struct amd_ip_funcs gfx_v8_0_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
+       .type = AMDGPU_RING_TYPE_GFX,
        .get_rptr = gfx_v8_0_ring_get_rptr,
        .get_wptr = gfx_v8_0_ring_get_wptr_gfx,
        .set_wptr = gfx_v8_0_ring_set_wptr_gfx,
@@ -6558,6 +6557,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
 };
 
 static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
+       .type = AMDGPU_RING_TYPE_COMPUTE,
        .get_rptr = gfx_v8_0_ring_get_rptr,
        .get_wptr = gfx_v8_0_ring_get_wptr_compute,
        .set_wptr = gfx_v8_0_ring_set_wptr_compute,

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index 7cd24e42aa9a1ee9d14ef131b210b3c87605743c..36a135de44fe03c4f67061d55cd5c4c97da51220 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -952,8 +952,8 @@ static int sdma_v2_4_sw_init(void *handle)
                                     SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP), 0xf,
                                     &adev->sdma.trap_irq,
                                     (i == 0) ?
-                                    AMDGPU_SDMA_IRQ_TRAP0 : AMDGPU_SDMA_IRQ_TRAP1,
-                                    AMDGPU_RING_TYPE_SDMA);
+                                    AMDGPU_SDMA_IRQ_TRAP0 :
+                                    AMDGPU_SDMA_IRQ_TRAP1);
                if (r)
                        return r;
        }
@@ -1206,6 +1206,7 @@ const struct amd_ip_funcs sdma_v2_4_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = {
+       .type = AMDGPU_RING_TYPE_SDMA,
        .get_rptr = sdma_v2_4_ring_get_rptr,
        .get_wptr = sdma_v2_4_ring_get_wptr,
        .set_wptr = sdma_v2_4_ring_set_wptr,

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 6518993e23a8f3ecaac544f2c478613da4307526..e4f59c36f989c03d8182552ac595c37644d9c9f0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -1164,8 +1164,8 @@ static int sdma_v3_0_sw_init(void *handle)
                                     SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP), 0xf,
                                     &adev->sdma.trap_irq,
                                     (i == 0) ?
-                                    AMDGPU_SDMA_IRQ_TRAP0 : AMDGPU_SDMA_IRQ_TRAP1,
-                                    AMDGPU_RING_TYPE_SDMA);
+                                    AMDGPU_SDMA_IRQ_TRAP0 :
+                                    AMDGPU_SDMA_IRQ_TRAP1);
                if (r)
                        return r;
        }
@@ -1549,6 +1549,7 @@ const struct amd_ip_funcs sdma_v3_0_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = {
+       .type = AMDGPU_RING_TYPE_SDMA,
        .get_rptr = sdma_v3_0_ring_get_rptr,
        .get_wptr = sdma_v3_0_ring_get_wptr,
        .set_wptr = sdma_v3_0_ring_set_wptr,

diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c
index c1c1b5179de5bc4a008a4c62d77c1a5a7fd6146f..1aee45b0bb9e3df685bc04241ddc61250d48c34e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si_dma.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c
@@ -534,8 +534,8 @@ static int si_dma_sw_init(void *handle)
                                     DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0), 0xf,
                                     &adev->sdma.trap_irq,
                                     (i == 0) ?
-                                    AMDGPU_SDMA_IRQ_TRAP0 : AMDGPU_SDMA_IRQ_TRAP1,
-                                    AMDGPU_RING_TYPE_SDMA);
+                                    AMDGPU_SDMA_IRQ_TRAP0 :
+                                    AMDGPU_SDMA_IRQ_TRAP1);
                if (r)
                        return r;
        }
@@ -764,6 +764,7 @@ const struct amd_ip_funcs si_dma_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs si_dma_ring_funcs = {
+       .type = AMDGPU_RING_TYPE_SDMA,
        .get_rptr = si_dma_ring_get_rptr,
        .get_wptr = si_dma_ring_get_wptr,
        .set_wptr = si_dma_ring_set_wptr,

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index 708de997e3b04b2d0c714e5ecfd89447181a78a0..55af8aca4b2acc040525e2b97df8b399c5aebae9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -117,7 +117,7 @@ static int uvd_v4_2_sw_init(void *handle)
        ring = &adev->uvd.ring;
        sprintf(ring->name, "uvd");
        r = amdgpu_ring_init(adev, ring, 512, PACKET0(mmUVD_NO_OP, 0), 0xf,
-                            &adev->uvd.irq, 0, AMDGPU_RING_TYPE_UVD);
+                            &adev->uvd.irq, 0);
 
        return r;
 }
@@ -742,6 +742,7 @@ const struct amd_ip_funcs uvd_v4_2_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = {
+       .type = AMDGPU_RING_TYPE_UVD,
        .get_rptr = uvd_v4_2_ring_get_rptr,
        .get_wptr = uvd_v4_2_ring_get_wptr,
        .set_wptr = uvd_v4_2_ring_set_wptr,

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 9e695e01f8b82768445dd7cd58b43ac4b279f9f3..21e725b50a90104448ba9ad2f643214c9d541ff6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -113,7 +113,7 @@ static int uvd_v5_0_sw_init(void *handle)
        ring = &adev->uvd.ring;
        sprintf(ring->name, "uvd");
        r = amdgpu_ring_init(adev, ring, 512, PACKET0(mmUVD_NO_OP, 0), 0xf,
-                            &adev->uvd.irq, 0, AMDGPU_RING_TYPE_UVD);
+                            &adev->uvd.irq, 0);
 
        return r;
 }
@@ -793,6 +793,7 @@ const struct amd_ip_funcs uvd_v5_0_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = {
+       .type = AMDGPU_RING_TYPE_UVD,
        .get_rptr = uvd_v5_0_ring_get_rptr,
        .get_wptr = uvd_v5_0_ring_get_wptr,
        .set_wptr = uvd_v5_0_ring_set_wptr,

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index aeb1b6e2c518d1e88037dc1ded2961637517ea86..65df5b20824300d8e8e1a5f2148e1ce4fe329326 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -117,7 +117,7 @@ static int uvd_v6_0_sw_init(void *handle)
        ring = &adev->uvd.ring;
        sprintf(ring->name, "uvd");
        r = amdgpu_ring_init(adev, ring, 512, PACKET0(mmUVD_NO_OP, 0), 0xf,
-                            &adev->uvd.irq, 0, AMDGPU_RING_TYPE_UVD);
+                            &adev->uvd.irq, 0);
 
        return r;
 }
@@ -1023,6 +1023,7 @@ const struct amd_ip_funcs uvd_v6_0_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
+       .type = AMDGPU_RING_TYPE_UVD,
        .get_rptr = uvd_v6_0_ring_get_rptr,
        .get_wptr = uvd_v6_0_ring_get_wptr,
        .set_wptr = uvd_v6_0_ring_set_wptr,
@@ -1046,6 +1047,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
 };
 
 static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
+       .type = AMDGPU_RING_TYPE_UVD,
        .get_rptr = uvd_v6_0_ring_get_rptr,
        .get_wptr = uvd_v6_0_ring_get_wptr,
        .set_wptr = uvd_v6_0_ring_set_wptr,

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
index 7ada30ddfa0dddfc5b3627e363ec74a3940565a6..cf0c68fda20ec50ec4a42f88444e42ed0ca1dfde 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
@@ -225,7 +225,7 @@ static int vce_v2_0_sw_init(void *handle)
                ring = &adev->vce.ring[i];
                sprintf(ring->name, "vce%d", i);
                r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf,
-                                    &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);
+                                    &adev->vce.irq, 0);
                if (r)
                        return r;
        }
@@ -610,6 +610,7 @@ const struct amd_ip_funcs vce_v2_0_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = {
+       .type = AMDGPU_RING_TYPE_VCE,
        .get_rptr = vce_v2_0_ring_get_rptr,
        .get_wptr = vce_v2_0_ring_get_wptr,
        .set_wptr = vce_v2_0_ring_set_wptr,

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index 0db59d885f048b66433bc107d26803ef0df2ef46..95fe8a8bda12ab071da85c1ce75dbe4029745c38 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -390,7 +390,7 @@ static int vce_v3_0_sw_init(void *handle)
                ring = &adev->vce.ring[i];
                sprintf(ring->name, "vce%d", i);
                r = amdgpu_ring_init(adev, ring, 512, VCE_CMD_NO_OP, 0xf,
-                                    &adev->vce.irq, 0, AMDGPU_RING_TYPE_VCE);
+                                    &adev->vce.irq, 0);
                if (r)
                        return r;
        }
@@ -829,6 +829,7 @@ const struct amd_ip_funcs vce_v3_0_ip_funcs = {
 };
 
 static const struct amdgpu_ring_funcs vce_v3_0_ring_phys_funcs = {
+       .type = AMDGPU_RING_TYPE_VCE,
        .get_rptr = vce_v3_0_ring_get_rptr,
        .get_wptr = vce_v3_0_ring_get_wptr,
        .set_wptr = vce_v3_0_ring_set_wptr,
@@ -848,6 +849,7 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_phys_funcs = {
 };
 
 static const struct amdgpu_ring_funcs vce_v3_0_ring_vm_funcs = {
+       .type = AMDGPU_RING_TYPE_VCE,
        .get_rptr = vce_v3_0_ring_get_rptr,
        .get_wptr = vce_v3_0_ring_get_wptr,
        .set_wptr = vce_v3_0_ring_set_wptr,