Our SMP cache flush ops use CPU cross calls to deal with things
like I-cache accesses not being broadcast in hardware, so ensure that
the CACHE_FLUSH_IS_SAFE reflects this.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
__asm__ __volatile__ ("trapa #0x3c\n");
}
-#define BUFMAX 2048
-
-#define CACHE_FLUSH_IS_SAFE 1
#define BREAK_INSTR_SIZE 2
+#define BUFMAX 2048
+
+#ifdef CONFIG_SMP
+# define CACHE_FLUSH_IS_SAFE 0
+#else
+# define CACHE_FLUSH_IS_SAFE 1
+#endif
+
#define GDB_ADJUSTS_BREAK_OFFSET
#endif /* __ASM_SH_KGDB_H */