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ath9k_hw: add a missing delay for an analog register
authorFelix Fietkau <nbd@openwrt.org>
Sat, 9 Jul 2011 04:12:54 +0000 (11:12 +0700)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 11 Jul 2011 19:02:15 +0000 (15:02 -0400)
AR_AN_SYNTH9 is in the analog shift register range and thus needs to be
written using the ath9k_hw_analog_shift_rmw function.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9002_phy.c patch | blob | blame | history

diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
index ac8b35c5fa0628d52d5deb80a354afab723134ad..3cbbb033fcea545c0f9e013ee02799227a79e2d6 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
@@ -131,8 +131,9 @@ static int ar9002_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
                        channelSel = CHANSEL_5G(freq);
 
                        /* RefDivA setting */
-                       REG_RMW_FIELD(ah, AR_AN_SYNTH9,
-                                     AR_AN_SYNTH9_REFDIVA, refDivA);
+                       ath9k_hw_analog_shift_rmw(ah, AR_AN_SYNTH9,
+                                     AR_AN_SYNTH9_REFDIVA,
+                                     AR_AN_SYNTH9_REFDIVA_S, refDivA);
 
                }