drm/radeon: fix typo in bandwidth calculation
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 29 Mar 2017 22:03:27 +0000 (18:03 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 7 Apr 2017 16:20:41 +0000 (12:20 -0400)
The RV3xx settings were getting applied to all older asics
rather than just RV3xx.

Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/r100.c

index aefca0b03f3827fde12ff836e88aadacd503851e..c31e660e35db1b6e5ee98ce036d1484c323aa141 100644 (file)
@@ -3295,7 +3295,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
                mem_trp = ((temp >> 8) & 0x7) + 1;
                mem_tras = ((temp >> 11) & 0xf) + 4;
        } else if (rdev->family == CHIP_RV350 ||
-                  rdev->family <= CHIP_RV380) {
+                  rdev->family == CHIP_RV380) {
                /* rv3x0 */
                mem_trcd = (temp & 0x7) + 3;
                mem_trp = ((temp >> 8) & 0x7) + 3;