spi: bcm2835: clock divider can be a multiple of 2
authorMartin Sperl <kernel@martin.sperl.org>
Thu, 19 Mar 2015 09:01:52 +0000 (09:01 +0000)
committerMark Brown <broonie@kernel.org>
Mon, 23 Mar 2015 18:52:26 +0000 (11:52 -0700)
The official documentation is wrong in this respect.
Has been tested empirically for dividers 2-1024

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-bcm2835.c

index 960dcce607c2c22faceaf0d23d13484268ddfe55..8de1925fe5548f9ea58579e26268f6fafe391d4b 100644 (file)
@@ -153,8 +153,9 @@ static int bcm2835_spi_start_transfer(struct spi_device *spi,
        if (spi_hz >= clk_hz / 2) {
                cdiv = 2; /* clk_hz/2 is the fastest we can go */
        } else if (spi_hz) {
-               /* CDIV must be a power of two */
-               cdiv = roundup_pow_of_two(DIV_ROUND_UP(clk_hz, spi_hz));
+               /* CDIV must be a multiple of two */
+               cdiv = DIV_ROUND_UP(clk_hz, spi_hz);
+               cdiv += (cdiv % 2);
 
                if (cdiv >= 65536)
                        cdiv = 0; /* 0 is the slowest we can go */