drm/i915: Remove the broken flush_ring from page-flip
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 23 Sep 2010 10:00:38 +0000 (11:00 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 23 Sep 2010 10:02:55 +0000 (11:02 +0100)
This is already performed with the pipelined flush, so by the time we
schedule the flush in the page-flip, the ring is NULL and we OOPs
instead.

Reported-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/intel_display.c

index 5fec2ca619e80f0848628abbd4015b4db6374fe4..ac41ca1157a5dbc670478eb8ba942fa3172e3b60 100644 (file)
@@ -1007,11 +1007,6 @@ int i915_gem_object_put_fence_reg(struct drm_gem_object *obj,
 void i915_gem_retire_requests(struct drm_device *dev);
 void i915_gem_reset_lists(struct drm_device *dev);
 void i915_gem_clflush_object(struct drm_gem_object *obj);
-void i915_gem_flush_ring(struct drm_device *dev,
-                        struct drm_file *file_priv,
-                        struct intel_ring_buffer *ring,
-                        uint32_t invalidate_domains,
-                        uint32_t flush_domains);
 int i915_gem_object_set_domain(struct drm_gem_object *obj,
                               uint32_t read_domains,
                               uint32_t write_domain);
index 3fd69ad19aa7521a82f4a74ceddf8ea6fd6e1e8a..174e38abc9ef520044ba8106ada842ac1433e10b 100644 (file)
@@ -1924,7 +1924,7 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno,
        return i915_do_wait_request(dev, seqno, 1, ring);
 }
 
-void
+static void
 i915_gem_flush_ring(struct drm_device *dev,
                    struct drm_file *file_priv,
                    struct intel_ring_buffer *ring,
index b92385498d2cefb32ba3d15467ec12d8fcad8b43..16541ee9e1e0b86021dfef84d7ee0eec1f429742 100644 (file)
@@ -5028,7 +5028,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
        struct intel_unpin_work *work;
        unsigned long flags, offset;
        int pipe = intel_crtc->pipe;
-       u32 was_dirty, pf, pipesrc;
+       u32 pf, pipesrc;
        int ret;
 
        work = kzalloc(sizeof *work, GFP_KERNEL);
@@ -5057,7 +5057,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
        obj = intel_fb->obj;
 
        mutex_lock(&dev->struct_mutex);
-       was_dirty = obj->write_domain & I915_GEM_GPU_DOMAINS;
        ret = intel_pin_and_fence_fb_obj(dev, obj, true);
        if (ret)
                goto cleanup_work;
@@ -5076,10 +5075,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
        atomic_inc(&obj_priv->pending_flip);
        work->pending_flip_obj = obj;
 
-       /* Schedule the pipelined flush */
-       if (was_dirty)
-               i915_gem_flush_ring(dev, NULL, obj_priv->ring, 0, was_dirty);
-
        if (IS_GEN3(dev) || IS_GEN2(dev)) {
                u32 flip_mask;