drm/i915: Set the SR01 "screen off" bit in i915_redisable_vga() too
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 25 Jan 2013 19:44:48 +0000 (21:44 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 31 Jan 2013 10:50:13 +0000 (11:50 +0100)
From BSpec / SR01 - Clocking Mode:
"The following sequence must be used when disabling the VGA plane.
 Write SR01 to set bit 5 = 1 to disable video output.
 Wait for 100us.
 Disable the VGA plane via Bit 31 of the MMIO VGA control."

So simply call i915_disable_vga() from i915_redisable_vga().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index 62f45907e4df358710e7dbbdf1f34f94227f036a..d75c6a0a4bd674879332fbda8d118043af8fe35d 100644 (file)
@@ -8936,8 +8936,7 @@ void i915_redisable_vga(struct drm_device *dev)
 
        if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
                DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
-               I915_WRITE(vga_reg, VGA_DISP_DISABLE);
-               POSTING_READ(vga_reg);
+               i915_disable_vga(dev);
        }
 }