drm/i915: Program Rcomp and band gap reset everytime we resume from power gate
authorShobhit Kumar <shobhit.kumar@intel.com>
Wed, 9 Apr 2014 08:29:30 +0000 (13:59 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 9 Apr 2014 19:54:27 +0000 (21:54 +0200)
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dsi.c

index 33656647f8bcf566ea8fba54f898ec6fc71b2b5b..7ceb8c67344aed94517f4b5d05d5c2eea7c3893f 100644 (file)
@@ -110,6 +110,15 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder)
 
        DRM_DEBUG_KMS("\n");
 
+       mutex_lock(&dev_priv->dpio_lock);
+       /* program rcomp for compliance, reduce from 50 ohms to 45 ohms
+        * needed everytime after power gate */
+       vlv_flisdsi_write(dev_priv, 0x04, 0x0004);
+       mutex_unlock(&dev_priv->dpio_lock);
+
+       /* bandgap reset is needed after everytime we do power gate */
+       band_gap_reset(dev_priv);
+
        val = I915_READ(MIPI_PORT_CTRL(pipe));
        I915_WRITE(MIPI_PORT_CTRL(pipe), val | LP_OUTPUT_HOLD);
        usleep_range(1000, 1500);
@@ -379,9 +388,6 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder)
 
        DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
 
-       /* XXX: Location of the call */
-       band_gap_reset(dev_priv);
-
        /* escape clock divider, 20MHz, shared for A and C. device ready must be
         * off when doing this! txclkesc? */
        tmp = I915_READ(MIPI_CTRL(0));