* @regs: registers descriptions
* @adc_info: per instance input channels definitions
* @trigs: external trigger sources
+ * @clk_required: clock is required
* @start_conv: routine to start conversions
* @stop_conv: routine to stop conversions
*/
const struct stm32_adc_regspec *regs;
const struct stm32_adc_info *adc_info;
struct stm32_adc_trig_info *trigs;
+ bool clk_required;
void (*start_conv)(struct stm32_adc *, bool dma);
void (*stop_conv)(struct stm32_adc *);
};
adc->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(adc->clk)) {
- dev_err(&pdev->dev, "Can't get clock\n");
- return PTR_ERR(adc->clk);
+ ret = PTR_ERR(adc->clk);
+ if (ret == -ENOENT && !adc->cfg->clk_required) {
+ adc->clk = NULL;
+ } else {
+ dev_err(&pdev->dev, "Can't get clock\n");
+ return ret;
+ }
}
- ret = clk_prepare_enable(adc->clk);
- if (ret < 0) {
- dev_err(&pdev->dev, "clk enable failed\n");
- return ret;
+ if (adc->clk) {
+ ret = clk_prepare_enable(adc->clk);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "clk enable failed\n");
+ return ret;
+ }
}
ret = stm32_adc_of_get_resolution(indio_dev);
dma_release_channel(adc->dma_chan);
}
err_clk_disable:
- clk_disable_unprepare(adc->clk);
+ if (adc->clk)
+ clk_disable_unprepare(adc->clk);
return ret;
}
adc->rx_buf, adc->rx_dma_buf);
dma_release_channel(adc->dma_chan);
}
- clk_disable_unprepare(adc->clk);
+ if (adc->clk)
+ clk_disable_unprepare(adc->clk);
return 0;
}
.regs = &stm32f4_adc_regspec,
.adc_info = &stm32f4_adc_info,
.trigs = stm32f4_adc_trigs,
+ .clk_required = true,
.start_conv = stm32f4_adc_start_conv,
.stop_conv = stm32f4_adc_stop_conv,
};