unsigned short
set_bfin_dma_config(char direction, char flow_mode,
- char intr_mode, char dma_mode, char width)
+ char intr_mode, char dma_mode, char width, char syncmode)
{
unsigned short config;
config =
((direction << 1) | (width << 2) | (dma_mode << 4) |
- (intr_mode << 6) | (flow_mode << 12) | RESTART);
+ (intr_mode << 6) | (flow_mode << 12) | (syncmode << 5));
return config;
}
EXPORT_SYMBOL(set_bfin_dma_config);
set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
INTR_ON_BUF,
DIMENSION_LINEAR,
- DATA_SIZE_8));
+ DATA_SIZE_8,
+ DMA_SYNC_RESTART));
set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
set_dma_x_modify(uart->tx_dma_channel, 1);
set_dma_config(uart->rx_dma_channel,
set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
INTR_ON_ROW, DIMENSION_2D,
- DATA_SIZE_8));
+ DATA_SIZE_8,
+ DMA_SYNC_RESTART));
set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
set_dma_x_modify(uart->rx_dma_channel, 1);
set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
set_dma_config(CH_EPPI0,
set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
INTR_DISABLE, DIMENSION_2D,
- DATA_SIZE_32));
+ DATA_SIZE_32,
+ DMA_NOSYNC_KEEP_DMA_BUF));
set_dma_x_count(CH_EPPI0, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
set_dma_x_modify(CH_EPPI0, DMA_BUS_SIZE / 8);
set_dma_y_count(CH_EPPI0, LCD_Y_RES);
#define INTR_ON_BUF 2
#define INTR_ON_ROW 3
+#define DMA_NOSYNC_KEEP_DMA_BUF 0
+#define DMA_SYNC_RESTART 1
+
struct dmasg {
unsigned long next_desc_addr;
unsigned long start_addr;
void set_dma_y_modify(unsigned int channel, short y_modify);
void set_dma_config(unsigned int channel, unsigned short config);
unsigned short set_bfin_dma_config(char direction, char flow_mode,
- char intr_mode, char dma_mode, char width);
+ char intr_mode, char dma_mode, char width,
+ char syncmode);
void set_dma_curr_addr(unsigned int channel, unsigned long addr);
/* get curr status for polling */