ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors
authorAlexandre Belloni <alexandre.belloni@free-electrons.com>
Wed, 23 Apr 2014 08:53:40 +0000 (10:53 +0200)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Mon, 12 May 2014 14:48:52 +0000 (16:48 +0200)
Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing.
Also, the at91sam9rl doesn't really have a by 3 divisor.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/boot/dts/at91sam9rl.dtsi

index 6202e161314a8cc530900e798cc8f7d515d1c675..981373c56bcc0cca558788fc6102aecc8f9ee2d6 100644 (file)
                                        clocks = <&main>;
                                        reg = <0>;
                                        atmel,clk-input-range = <1000000 32000000>;
-                                       #atmel,pll-clk-output-range-cells = <4>;
-                                       atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+                                       #atmel,pll-clk-output-range-cells = <3>;
+                                       atmel,pll-clk-output-ranges = <80000000 200000000 0>,
+                                                               <190000000 240000000 2>;
                                };
 
                                utmi: utmick {
                                        interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
                                        clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
                                        atmel,clk-output-range = <0 94000000>;
-                                       atmel,clk-divisors = <1 2 4 3>;
+                                       atmel,clk-divisors = <1 2 4 0>;
                                };
 
                                prog: progck {