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ARM: S3C24XX: add dma pdata for s3c2410, s3c2440 and s3c2442
authorHeiko Stuebner <heiko@sntech.de>
Sun, 20 Oct 2013 20:32:48 +0000 (05:32 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Sun, 20 Oct 2013 20:32:48 +0000 (05:32 +0900)
s3c2410 and s3c2442 share the same dma channels while s3c2440 has
slight differences. But on all three the reachable sources per dma
channel has constraints attached and thus encodes the usable
combinations using the S3C24XX_DMA_CHANREQ macro.

This also fixes the warning about s3c2410_dma_resource being unused
as reported by Olof Johansson.

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s3c24xx/common.c patch | blob | blame | history
arch/arm/mach-s3c24xx/common.h patch | blob | blame | history
include/linux/platform_data/dma-s3c24xx.h patch | blob | blame | history

diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index bdcb29f4ea31bd7084717babeafe6ab04c12ef5b..4adaa4b43ffe5282f915d83dcdc3d4489c6eebe7 100644 (file)
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -343,6 +343,50 @@ static struct resource s3c2410_dma_resource[] = {
 };
 #endif
 
+#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2442)
+static struct s3c24xx_dma_channel s3c2410_dma_channels[DMACH_MAX] = {
+       [DMACH_XD0] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 0), },
+       [DMACH_XD1] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 1), },
+       [DMACH_SDI] = { S3C24XX_DMA_APB, false, S3C24XX_DMA_CHANREQ(2, 0) |
+                                               S3C24XX_DMA_CHANREQ(2, 2) |
+                                               S3C24XX_DMA_CHANREQ(1, 3),
+       },
+       [DMACH_SPI0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 1), },
+       [DMACH_SPI1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 3), },
+       [DMACH_UART0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 0), },
+       [DMACH_UART1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 1), },
+       [DMACH_UART2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 3), },
+       [DMACH_TIMER] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 0) |
+                                                S3C24XX_DMA_CHANREQ(3, 2) |
+                                                S3C24XX_DMA_CHANREQ(3, 3),
+       },
+       [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 1) |
+                                                 S3C24XX_DMA_CHANREQ(1, 2),
+       },
+       [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 2), },
+       [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 0), },
+       [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 1), },
+       [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 2), },
+       [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), },
+};
+
+static struct s3c24xx_dma_platdata s3c2410_dma_platdata = {
+       .num_phy_channels = 4,
+       .channels = s3c2410_dma_channels,
+       .num_channels = DMACH_MAX,
+};
+
+struct platform_device s3c2410_device_dma = {
+       .name           = "s3c2410-dma",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(s3c2410_dma_resource),
+       .resource       = s3c2410_dma_resource,
+       .dev    = {
+               .platform_data  = &s3c2410_dma_platdata,
+       },
+};
+#endif
+
 #ifdef CONFIG_CPU_S3C2412
 static struct s3c24xx_dma_channel s3c2412_dma_channels[DMACH_MAX] = {
        [DMACH_XD0] = { S3C24XX_DMA_AHB, true, 17 },
@@ -384,6 +428,62 @@ struct platform_device s3c2412_device_dma = {
 };
 #endif
 
+#if defined(CONFIG_CPU_S3C2440)
+static struct s3c24xx_dma_channel s3c2440_dma_channels[DMACH_MAX] = {
+       [DMACH_XD0] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 0), },
+       [DMACH_XD1] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 1), },
+       [DMACH_SDI] = { S3C24XX_DMA_APB, false, S3C24XX_DMA_CHANREQ(2, 0) |
+                                               S3C24XX_DMA_CHANREQ(6, 1) |
+                                               S3C24XX_DMA_CHANREQ(2, 2) |
+                                               S3C24XX_DMA_CHANREQ(1, 3),
+       },
+       [DMACH_SPI0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 1), },
+       [DMACH_SPI1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 3), },
+       [DMACH_UART0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 0), },
+       [DMACH_UART1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 1), },
+       [DMACH_UART2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 3), },
+       [DMACH_TIMER] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 0) |
+                                                S3C24XX_DMA_CHANREQ(3, 2) |
+                                                S3C24XX_DMA_CHANREQ(3, 3),
+       },
+       [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 1) |
+                                                 S3C24XX_DMA_CHANREQ(1, 2),
+       },
+       [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(5, 0) |
+                                                  S3C24XX_DMA_CHANREQ(0, 2),
+       },
+       [DMACH_PCM_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(6, 0) |
+                                                 S3C24XX_DMA_CHANREQ(5, 2),
+       },
+       [DMACH_PCM_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(5, 1) |
+                                                 S3C24XX_DMA_CHANREQ(6, 3),
+       },
+       [DMACH_MIC_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(6, 2) |
+                                                 S3C24XX_DMA_CHANREQ(5, 3),
+       },
+       [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 0), },
+       [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 1), },
+       [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 2), },
+       [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), },
+};
+
+static struct s3c24xx_dma_platdata s3c2440_dma_platdata = {
+       .num_phy_channels = 4,
+       .channels = s3c2440_dma_channels,
+       .num_channels = DMACH_MAX,
+};
+
+struct platform_device s3c2440_device_dma = {
+       .name           = "s3c2410-dma",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(s3c2410_dma_resource),
+       .resource       = s3c2410_dma_resource,
+       .dev    = {
+               .platform_data  = &s3c2440_dma_platdata,
+       },
+};
+#endif
+
 #if defined(CONFIG_CPUS_3C2443) || defined(CONFIG_CPU_S3C2416)
 static struct resource s3c2443_dma_resource[] = {
        [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA),
diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h
index fe071893275f0d5c3e905d6832eba788c64ba13c..e46c1041721669e3503555cadff0c6bbbcaaf3df 100644 (file)
--- a/arch/arm/mach-s3c24xx/common.h
+++ b/arch/arm/mach-s3c24xx/common.h
@@ -109,7 +109,9 @@ extern void s3c2443_init_irq(void);
 
 extern struct syscore_ops s3c24xx_irq_syscore_ops;
 
+extern struct platform_device s3c2410_device_dma;
 extern struct platform_device s3c2412_device_dma;
+extern struct platform_device s3c2440_device_dma;
 extern struct platform_device s3c2443_device_dma;
 
 #endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
diff --git a/include/linux/platform_data/dma-s3c24xx.h b/include/linux/platform_data/dma-s3c24xx.h
index 5a0cfffe3bbba0ab4e9b578cf58f50b2ccae40ee..89ba1b0c90e49dd6d193cd80e154fcf8b4d5870d 100644 (file)
--- a/include/linux/platform_data/dma-s3c24xx.h
+++ b/include/linux/platform_data/dma-s3c24xx.h
@@ -9,6 +9,9 @@
  * any later version.
  */
 
+/* Helper to encode the source selection constraints for early s3c socs. */
+#define S3C24XX_DMA_CHANREQ(src, chan) ((BIT(3) | src) << chan * 4)
+
 enum s3c24xx_dma_bus {
        S3C24XX_DMA_APB,
        S3C24XX_DMA_AHB,