ARM: dts: NSP: DT Clean-ups

The QSPI entry was added out of the sequental order that the rest of the
DTSI file is in.  Move it to make it fit in properly.  Also, some other
entries have been added in a non-alphabetical order in the DTS files,
making them different from the other NSP DTS files.  Move the relevant
peices to make it match.  Finally, remove errant new lines.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index b6142bda661e1a701c66c6590970553ce5255fcb..9cd77ab7c3159675f8916f64e3c4aa7c7f180db7 100644 (file)
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -241,29 +241,6 @@
                        brcm,nand-has-wp;
                };
 
-               gpiob: gpio@30000 {
-                       compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
-                       reg = <0x30000 0x50>;
-                       #gpio-cells = <2>;
-                       gpio-controller;
-                       ngpios = <4>;
-                       interrupt-controller;
-                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
-               };
-
-               pwm: pwm@31000 {
-                       compatible = "brcm,iproc-pwm";
-                       reg = <0x31000 0x28>;
-                       clocks = <&osc>;
-                       #pwm-cells = <3>;
-                       status = "disabled";
-               };
-
-               rng: rng@33000 {
-                       compatible = "brcm,bcm-nsp-rng";
-                       reg = <0x33000 0x14>;
-               };
-
                qspi: qspi@27200 {
                        compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
                        reg = <0x027200 0x184>,
@@ -293,6 +270,29 @@
                        #size-cells = <0>;
                };
 
+               gpiob: gpio@30000 {
+                       compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
+                       reg = <0x30000 0x50>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+                       ngpios = <4>;
+                       interrupt-controller;
+                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               pwm: pwm@31000 {
+                       compatible = "brcm,iproc-pwm";
+                       reg = <0x31000 0x28>;
+                       clocks = <&osc>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
+               rng: rng@33000 {
+                       compatible = "brcm,bcm-nsp-rng";
+                       reg = <0x33000 0x14>;
+               };
+
                ccbtimer0: timer@34000 {
                        compatible = "arm,sp804";
                        reg = <0x34000 0x1000>;

diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
index a21b0fd21f4ef586223d8033b2bbb1f8b762076a..7afd84530360fbed8358a48cd9760a4cc44c8c03 100644 (file)
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -65,7 +65,6 @@
        status = "okay";
 };
 
-
 &amac1 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
index be7f2f8ecf39baabbe3a6276b17976fea14141d1..9da18cd836e48290ce5de4e04173f7a691a11181 100644 (file)
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -65,7 +65,6 @@
        status = "okay";
 };
 
-
 &amac1 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index 959cde911c3c5102c5b5db0f72cf6a6b86476934..4492f55720d9f7cd6979e7133a007e42c973bda0 100644 (file)
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -59,6 +59,8 @@
        };
 };
 
+/* XHCI, MMC, and Ethernet support needed to be complete */
+
 &i2c0 {
        temperature-sensor@4c {
                compatible = "adi,adt7461a";
@@ -115,12 +117,6 @@
        };
 };
 
-/* XHCI, MMC, and Ethernet support needed to be complete */
-
-&uart0 {
-       status = "okay";
-};
-
 &pcie0 {
        status = "okay";
 };
@@ -129,6 +125,15 @@
        status = "okay";
 };
 
+&pinctrl {
+       pinctrl-names = "default";
+       pinctrl-0 = <&nand_sel>;
+       nand_sel: nand_sel {
+               function = "nand";
+               groups = "nand_grp";
+       };
+};
+
 &sata_phy0 {
        status = "okay";
 };
@@ -141,11 +146,6 @@
        status = "okay";
 };
 
-&pinctrl {
-       pinctrl-names = "default";
-       pinctrl-0 = <&nand_sel>;
-       nand_sel: nand_sel {
-               function = "nand";
-               groups = "nand_grp";
-       };
+&uart0 {
+       status = "okay";
 };

diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index 4ceb8fef8041ef3176c9568b283ea0f7f6bf289b..32ea59a6fd16ff0a5a0d7e3ebb60bac1580fb08d 100644 (file)
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -120,6 +120,14 @@
        };
 };
 
+&sata_phy0 {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
 &srab {
        compatible = "brcm,bcm58623-srab", "brcm,nsp-srab";
        status = "okay";
@@ -165,14 +173,6 @@
        };
 };
 
-&sata_phy0 {
-       status = "okay";
-};
-
-&sata {
-       status = "okay";
-};
-
 &uart0 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 442002597063516f0fa060b3886ac5d11d802e89..e7a4cb1e53bbf768761139b8ed676a12fb5a4051 100644 (file)
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -1,7 +1,7 @@
 /*
  *  BSD LICENSE
  *
- *  Copyright (c) 2016 Broadcom.  All rights reserved.
+ *  Copyright(c) 2016 Broadcom.  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -59,6 +59,10 @@
        };
 };
 
+&amac0 {
+       status = "okay";
+};
+
 &nand {
        nandcs@0 {
                compatible = "brcm,nandcs";
@@ -97,10 +101,6 @@
        };
 };
 
-&uart0 {
-       status = "okay";
-};
-
 &pcie0 {
        status = "okay";
 };
@@ -118,7 +118,15 @@
        };
 };
 
-&amac0 {
+&sata_phy0 {
+       status = "okay";
+};
+
+&sata_phy1 {
+       status = "okay";
+};
+
+&sata {
        status = "okay";
 };
 
@@ -167,14 +175,6 @@
        };
 };
 
-&sata_phy0 {
-       status = "okay";
-};
-
-&sata_phy1 {
-       status = "okay";
-};
-
-&sata {
+&uart0 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 59d96fb91583c76378e868bf63a84f32803f2ef4..98337d6a238364515bcce8a4baad5eadc08c6bf2 100644 (file)
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -53,14 +53,6 @@
        };
 };
 
-&uart0 {
-       status = "okay";
-};
-
-&uart1 {
-       status = "okay";
-};
-
 &amac0 {
        status = "okay";
 };
@@ -69,30 +61,6 @@
        status = "okay";
 };
 
-&pcie0 {
-       status = "okay";
-};
-
-&pcie1 {
-       status = "okay";
-};
-
-&pcie2 {
-       status = "okay";
-};
-
-&sata_phy0 {
-       status = "okay";
-};
-
-&sata_phy1 {
-       status = "okay";
-};
-
-&sata {
-       status = "okay";
-};
-
 &nand {
        nandcs@0 {
                compatible = "brcm,nandcs";
@@ -131,6 +99,18 @@
        };
 };
 
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&pcie2 {
+       status = "okay";
+};
+
 &pinctrl {
        pinctrl-names = "default";
        pinctrl-0 = <&nand_sel>;
@@ -173,3 +153,23 @@
                };
        };
 };
+
+&sata_phy0 {
+       status = "okay";
+};
+
+&sata_phy1 {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};