Merge branches 'alignment', 'fixes', 'l2c' (early part) and 'misc' into for-next
authorRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 5 Jun 2014 11:35:52 +0000 (12:35 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 5 Jun 2014 11:35:52 +0000 (12:35 +0100)
17 files changed:
1  2  3  4 
arch/arm/Kconfig
arch/arm/common/mcpm_entry.c
arch/arm/include/asm/cputype.h
arch/arm/include/asm/mach/arch.h
arch/arm/include/asm/mcpm.h
arch/arm/kernel/Makefile
arch/arm/kernel/entry-armv.S
arch/arm/kernel/entry-header.S
arch/arm/kernel/head.S
arch/arm/kernel/iwmmxt.S
arch/arm/kernel/setup.c
arch/arm/mach-orion5x/common.h
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pbx.c
arch/arm/mm/dma-mapping.c
arch/arm/mm/init.c
arch/arm/mm/mmu.c

index db3c5414223e7298346c6338665263d5f51c0e3c,db3c5414223e7298346c6338665263d5f51c0e3c,c9d7196fd0bd51ef21b00e155171be722936f36c,03551fafb1fdf3388994ddea6419ab3727f51f11..8615dfa604c4608ae6d029fc6983e48a757924f8
@@@@@ -1105,15 -1105,15 -1105,15 -1101,10 +1102,10 @@@@@ source "arch/arm/firmware/Kconfig
    
    source arch/arm/mm/Kconfig
    
--- config ARM_NR_BANKS
---     int
---     default 16 if ARCH_EP93XX
---     default 8
--- 
    config IWMMXT
   -    bool "Enable iWMMXt support" if !CPU_PJ4
   -    depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
   -    default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
   +    bool "Enable iWMMXt support"
   +    depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
   +    default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
        help
          Enable support for iWMMXt context switching at run time if
          running on a CPU that supports it.
Simple merge
Simple merge
index 17a3fa2979e8ae5c5a56f88eda448f635c3e132c,17a3fa2979e8ae5c5a56f88eda448f635c3e132c,5249cc3c52f44307aaa4d626ab32c793aa2d3df6,c43473afde8a0bb1073b5d84eed95c8d21a439d8..060a75e99263dd3613fb40eb1bf43998cae433d1
@@@@@ -45,10 -45,10 -45,13 -44,9 +44,12 @@@@@ struct machine_desc 
        unsigned char           reserve_lp1 :1; /* never has lp1        */
        unsigned char           reserve_lp2 :1; /* never has lp2        */
        enum reboot_mode        reboot_mode;    /* default restart mode */
++ +    unsigned                l2c_aux_val;    /* L2 cache aux value   */
++ +    unsigned                l2c_aux_mask;   /* L2 cache aux mask    */
++ +    void                    (*l2c_write_sec)(unsigned long, unsigned);
        struct smp_operations   *smp;           /* SMP operations       */
        bool                    (*smp_init)(void);
---     void                    (*fixup)(struct tag *, char **,
---                                      struct meminfo *);
+++     void                    (*fixup)(struct tag *, char **);
        void                    (*init_meminfo)(void);
        void                    (*reserve)(void);/* reserve mem blocks  */
        void                    (*map_io)(void);/* IO mapping function  */
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index 2452dd1bef53b0eb719dcda0ce127c2f5ddaeec9,2452dd1bef53b0eb719dcda0ce127c2f5ddaeec9,2452dd1bef53b0eb719dcda0ce127c2f5ddaeec9,4bb029ea89170611919ef2414b99227753c6fd67..a5599cfc43cbb17280e26bc942c30853ab954c7f
    #include <asm/ptrace.h>
    #include <asm/thread_info.h>
    #include <asm/asm-offsets.h>
+++ #include <asm/assembler.h>
    
   -#if defined(CONFIG_CPU_PJ4)
   +#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
    #define PJ4(code...)                code
    #define XSC(code...)
   -#else
   +#elif defined(CONFIG_CPU_MOHAWK) || \
   +    defined(CONFIG_CPU_XSC3) || \
   +    defined(CONFIG_CPU_XSCALE)
    #define PJ4(code...)
    #define XSC(code...)                code
   +#else
   +#error "Unsupported iWMMXt architecture"
    #endif
    
    #define MMX_WR0                     (0x00)
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge