#define XNP_MP_FORMATTED (1 << 13)
#define XNP_NP_EXCHANGE (1 << 15)
-#define XGBE_PHY_RATECHANGE_COUNT 100
+#define XGBE_PHY_RATECHANGE_COUNT 500
#ifndef MDIO_PMA_10GBR_PMD_CTRL
#define MDIO_PMA_10GBR_PMD_CTRL 0x0096
/* Wait for Rx and Tx ready */
wait = XGBE_PHY_RATECHANGE_COUNT;
while (wait--) {
- usleep_range(10, 20);
+ usleep_range(50, 75);
status = XSIR0_IOREAD(priv, SIR0_STATUS);
if (XSIR_GET_BITS(status, SIR0_STATUS, RX_READY) &&
return;
}
- netdev_err(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n",
+ netdev_dbg(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n",
status);
}