powerpc/83xx: Add power management support for MPC83xx QE boards
authorAnton Vorontsov <avorontsov@ru.mvista.com>
Tue, 15 Sep 2009 21:44:02 +0000 (01:44 +0400)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 12 Nov 2009 03:43:31 +0000 (21:43 -0600)
Simply add power management controller nodes and sleep properties.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/boot/dts/kmeter1.dts
arch/powerpc/boot/dts/mpc832x_mds.dts
arch/powerpc/boot/dts/mpc832x_rdb.dts
arch/powerpc/boot/dts/mpc836x_mds.dts
arch/powerpc/boot/dts/mpc836x_rdk.dts

index 167044f7de1d6e2102a02ee526f4ebeadeab607e..65b8b4f27efe1d6bdbbc3c44ba11806b1ce9f477 100644 (file)
                reg = <0xe0000000 0x00000200>;
                bus-frequency = <0>;    /* Filled in by U-Boot */
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
index 436c9c671dd9c86edabd0ca1054490e806b7c841..05ad8c98e52721e23a12f72a1221bc4004e4d148 100644 (file)
                        reg = <0x200 0x100>;
                };
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x4c>;
                        fsl,descriptor-types-mask = <0x0122003f>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                ipic: pic@700 {
                       0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
+               sleep = <&pmc 0x00010000>;
        };
 };
index 9a0952f74b812555b3208d877618f3ff00f57891..f4fadb23ad6f66d1e119b7d7000a4bfa8489df0e 100644 (file)
                        reg = <0x200 0x100>;
                };
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x4c>;
                        fsl,descriptor-types-mask = <0x0122003f>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                ipic:pic@700 {
                       0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
+               sleep = <&pmc 0x00010000>;
        };
 };
index 39ff4c829cafd125e0db34484cea04df1a393e99..45cfa1c50a2a629614cd2909ac2f7d6bc18c6bb9 100644 (file)
                        reg = <0x200 0x100>;
                };
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x7e>;
                        fsl,descriptor-types-mask = <0x01010ebf>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                ipic: pic@700 {
                       0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
+               sleep = <&pmc 0x00010000>;
        };
 };
index 6315d6fcc58aa87aeb0acc2617c9366a441a4f66..bdf4459677b14dcd55245bad4d83c9bea3322f44 100644 (file)
                        reg = <0x200 0x100>;
                };
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x7e>;
                        fsl,descriptor-types-mask = <0x01010ebf>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                ipic: interrupt-controller@700 {
                                 0xa800 0 0 2 &ipic 20 8
                                 0xa800 0 0 3 &ipic 21 8
                                 0xa800 0 0 4 &ipic 18 8>;
+               sleep = <&pmc 0x00010000>;
                /* filled by u-boot */
                bus-range = <0 0>;
                clock-frequency = <0>;