powerpc: Remove fp_enable() and vec_enable(), use msr_check_and_{set, clear}()

More consolidation of our MSR available bit handling.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index a2e8918408064c59fa854ec8ab4faeb19db1fdb4..ac2330820b9ae2de3c8fedfe4ffc47987f6ed992 100644 (file)
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -380,8 +380,6 @@ extern int set_endian(struct task_struct *tsk, unsigned int val);
 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
 extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
 
-extern void fp_enable(void);
-extern void vec_enable(void);
 extern void load_fp_state(struct thread_fp_state *fp);
 extern void store_fp_state(struct thread_fp_state *fp);
 extern void load_vr_state(struct thread_vr_state *vr);

diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 431ab571ed1b1ec8cb859ddfa8bb8468e162a201..2117eaca3d288232a735325f2a31bd2a3c80e4cf 100644 (file)
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -76,22 +76,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
        blr
 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 
-/*
- * Enable use of the FPU, and VSX if possible, for the caller.
- */
-_GLOBAL(fp_enable)
-       mfmsr   r3
-       ori     r3,r3,MSR_FP
-#ifdef CONFIG_VSX
-BEGIN_FTR_SECTION
-       oris    r3,r3,MSR_VSX@h
-END_FTR_SECTION_IFSET(CPU_FTR_VSX)
-#endif
-       SYNC
-       MTMSRD(r3)
-       isync                   /* (not necessary for arch 2.02 and later) */
-       blr
-
 /*
  * Load state from memory into FP registers including FPSCR.
  * Assumes the caller has enabled FP in the MSR.

diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 1eafceefeac9b00c0e5878b6de35dc09000a7290..9f8444b84ddeed65d2f7029e4ecf1216ed5dfa02 100644 (file)
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -732,13 +732,15 @@ void restore_tm_state(struct pt_regs *regs)
        msr_diff = current->thread.ckpt_regs.msr & ~regs->msr;
        msr_diff &= MSR_FP | MSR_VEC | MSR_VSX;
        if (msr_diff & MSR_FP) {
-               fp_enable();
+               msr_check_and_set(MSR_FP);
                load_fp_state(&current->thread.fp_state);
+               msr_check_and_clear(MSR_FP);
                regs->msr |= current->thread.fpexc_mode;
        }
        if (msr_diff & MSR_VEC) {
-               vec_enable();
+               msr_check_and_set(MSR_VEC);
                load_vr_state(&current->thread.vr_state);
+               msr_check_and_clear(MSR_VEC);
        }
        regs->msr |= msr_diff;
 }

diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 98675b08efe2b9eb2eba2a3fd3526b85f355eba9..162d0f7149419f50a7324e8e02086ab03bee993b 100644 (file)
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -32,16 +32,6 @@ _GLOBAL(do_load_up_transact_altivec)
        blr
 #endif
 
-/*
- * Enable use of VMX/Altivec for the caller.
- */
-_GLOBAL(vec_enable)
-       mfmsr   r3
-       oris    r3,r3,MSR_VEC@h
-       MTMSRD(r3)
-       isync
-       blr
-
 /*
  * Load state from memory into VMX registers including VSCR.
  * Assumes the caller has enabled VMX in the MSR.