ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line
authorKevin Hilman <khilman@linaro.org>
Sat, 25 May 2013 00:24:21 +0000 (17:24 -0700)
committerBenoit Cousson <benoit.cousson@linaro.org>
Mon, 3 Jun 2013 12:55:29 +0000 (14:55 +0200)
Earlier commits ensured proper muxing of pins related to proper
TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure
sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM:
OMAP4: TWL: mux sys_drm_msecure as output for PMIC).

However these only fixed legacy boot and not DT boot.  For DT boot,
the default mux values need to be set properly in DT.

Special thanks to Nishanth Menon for the review and catching some
major flaws in earlier versions.

Tested on OMAP4430/Panda and OMAP4460/Panda-ES.

Cc: Nishanth Menon <nm@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
[benoit.cousson@linaro.org: Slightly change the subject to align
board name with file name]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
arch/arm/boot/dts/omap4-panda-common.dtsi
arch/arm/boot/dts/omap4-sdp.dts

index 03bd60deb52b8faf6e5043eb1a346739c60b1c43..eeb734e257096b3d1e13b651e25e95576fe875fb 100644 (file)
        };
 };
 
+&omap4_pmx_wkup {
+       pinctrl-names = "default";
+       pinctrl-0 = <
+                       &twl6030_wkup_pins
+       >;
+
+       twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
+               pinctrl-single,pins = <
+                       0x14 0x2        /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */
+               >;
+       };
+};
+
 &omap4_pmx_core {
        pinctrl-names = "default";
        pinctrl-0 = <
+                       &twl6030_pins
                        &twl6040_pins
                        &mcpdm_pins
                        &mcbsp1_pins
                        &tpd12s015_pins
        >;
 
+       twl6030_pins: pinmux_twl6030_pins {
+               pinctrl-single,pins = <
+                       0x15e 0x4118    /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */
+               >;
+       };
+
        twl6040_pins: pinmux_twl6040_pins {
                pinctrl-single,pins = <
                        0xe0 0x3        /* hdq_sio.gpio_127 OUTPUT | MODE3 */
index a35d9cd5806317dfa5cfc82e3f648fec38711822..98505a2ef1622afecb200b05907076411219dc6b 100644 (file)
        };
 };
 
+&omap4_pmx_wkup {
+       pinctrl-names = "default";
+       pinctrl-0 = <
+                       &twl6030_wkup_pins
+       >;
+
+       twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
+               pinctrl-single,pins = <
+                       0x14 0x2        /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */
+               >;
+       };
+};
+
 &omap4_pmx_core {
        pinctrl-names = "default";
        pinctrl-0 = <
+                       &twl6030_pins
                        &twl6040_pins
                        &mcpdm_pins
                        &dmic_pins
                >;
        };
 
+       twl6030_pins: pinmux_twl6030_pins {
+               pinctrl-single,pins = <
+                       0x15e 0x4118    /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */
+               >;
+       };
+
        twl6040_pins: pinmux_twl6040_pins {
                pinctrl-single,pins = <
                        0xe0 0x3        /* hdq_sio.gpio_127 OUTPUT | MODE3 */