drm/amdgpu: fix to miss program invalidation at resume

This patch moves invalidation into gart enable function from hw_init.
Because we would like align the sequence calling between init and resume.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 626afc046f78d5122aa23aacf91c28edf2a6885a..bbc310c970700b7eb64887e3d91e262659f36f01 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -232,6 +232,20 @@ static void gfxhub_v1_0_setup_vmid_config(struct amdgpu_device *adev)
        }
 }
 
+static void gfxhub_v1_0_program_invalidation(struct amdgpu_device *adev)
+{
+       unsigned i;
+
+       for (i = 0 ; i < 18; ++i) {
+               WREG32(SOC15_REG_OFFSET(GC, 0,
+                                       mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32) +
+                      2 * i, 0xffffffff);
+               WREG32(SOC15_REG_OFFSET(GC, 0,
+                                       mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32) +
+                      2 * i, 0x1f);
+       }
+}
+
 int gfxhub_v1_0_gart_enable(struct amdgpu_device *adev)
 {
        if (amdgpu_sriov_vf(adev)) {
@@ -255,6 +269,7 @@ int gfxhub_v1_0_gart_enable(struct amdgpu_device *adev)
        gfxhub_v1_0_enable_system_domain(adev);
        gfxhub_v1_0_disable_identity_aperture(adev);
        gfxhub_v1_0_setup_vmid_config(adev);
+       gfxhub_v1_0_program_invalidation(adev);
 
        return 0;
 }
@@ -364,18 +379,6 @@ static int gfxhub_v1_0_sw_fini(void *handle)
 
 static int gfxhub_v1_0_hw_init(void *handle)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       unsigned i;
-
-       for (i = 0 ; i < 18; ++i) {
-               WREG32(SOC15_REG_OFFSET(GC, 0,
-                                       mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32) +
-                      2 * i, 0xffffffff);
-               WREG32(SOC15_REG_OFFSET(GC, 0,
-                                       mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32) +
-                      2 * i, 0x1f);
-       }
-
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index a5b01771ddb94b7967900aa175da932f095b724b..3d0c652daab8c0ee5c35334cf89e0646ea54cbef 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -244,6 +244,20 @@ static void mmhub_v1_0_setup_vmid_config(struct amdgpu_device *adev)
        }
 }
 
+static void mmhub_v1_0_program_invalidation(struct amdgpu_device *adev)
+{
+       unsigned i;
+
+       for (i = 0; i < 18; ++i) {
+               WREG32(SOC15_REG_OFFSET(MMHUB, 0,
+                                       mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32) +
+                      2 * i, 0xffffffff);
+               WREG32(SOC15_REG_OFFSET(MMHUB, 0,
+                                       mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32) +
+                      2 * i, 0x1f);
+       }
+}
+
 int mmhub_v1_0_gart_enable(struct amdgpu_device *adev)
 {
        if (amdgpu_sriov_vf(adev)) {
@@ -267,6 +281,7 @@ int mmhub_v1_0_gart_enable(struct amdgpu_device *adev)
        mmhub_v1_0_enable_system_domain(adev);
        mmhub_v1_0_disable_identity_aperture(adev);
        mmhub_v1_0_setup_vmid_config(adev);
+       mmhub_v1_0_program_invalidation(adev);
 
        return 0;
 }
@@ -375,18 +390,6 @@ static int mmhub_v1_0_sw_fini(void *handle)
 
 static int mmhub_v1_0_hw_init(void *handle)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       unsigned i;
-
-       for (i = 0; i < 18; ++i) {
-               WREG32(SOC15_REG_OFFSET(MMHUB, 0,
-                                       mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32) +
-                      2 * i, 0xffffffff);
-               WREG32(SOC15_REG_OFFSET(MMHUB, 0,
-                                       mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32) +
-                      2 * i, 0x1f);
-       }
-
        return 0;
 }