MIPS: Add M6250 cases to CPU switch statements

Add casses supporting the M6250 CPU to various switch statements in the
core MIPS kernel code that define behaviour dependent upon the CPU.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Maciej W. Rozycki <macro@codesourcery.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12374/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 2cb0979b5dc5a0bc36b46468f433a2f92bd7ea35..fbe1881f28fca71d6a4f5e6306357e3c14818e98 100644 (file)
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -77,6 +77,10 @@ static inline int __pure __get_cpu_type(const int cpu_type)
         */
 #endif
 
+#ifdef CONFIG_SYS_HAS_CPU_MIPS32_R6
+       case CPU_M6250:
+#endif
+
 #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R6
        case CPU_I6400:
        case CPU_P6600:

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 729a7d48ceee8ade9016f4d43c3ab111e119d292..e64d595fdcf2c9a9b49c8fcefb7070c29cd07a91 100644 (file)
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1286,6 +1286,7 @@ static void probe_pcache(void)
        case CPU_QEMU_GENERIC:
        case CPU_I6400:
        case CPU_P6600:
+       case CPU_M6250:
                if (!(read_c0_config7() & MIPS_CONF7_IAR) &&
                    (c->icache.waysize > PAGE_SIZE))
                        c->icache.flags |= MIPS_CACHE_ALIASES;