drm/msm: drop qcom,chipid
authorRob Clark <robdclark@gmail.com>
Mon, 30 Jan 2017 16:02:27 +0000 (11:02 -0500)
committerRob Clark <robdclark@gmail.com>
Mon, 6 Feb 2017 16:28:42 +0000 (11:28 -0500)
The original way we determined the gpu version was based on downstream
bindings from android kernel.  A cleaner way is to get the version from
the compatible string.

Note that no upstream dtb uses these bindings.  But the code still
supports falling back to the legacy bindings (with a warning), so that
we are still compatible with the gpu dt node from android device
kernels.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/display/msm/gpu.txt
drivers/gpu/drm/msm/adreno/adreno_device.c
drivers/gpu/drm/msm/msm_drv.c

index 747b984c7210b7db688238c19023febd75949ec5..7ac3052ca7b55320541b5c59015e42c7cd6de197 100644 (file)
@@ -1,7 +1,11 @@
 Qualcomm adreno/snapdragon GPU
 
 Required properties:
-- compatible: "qcom,adreno-3xx"
+- compatible: "qcom,adreno-XYZ.W", "qcom,adreno"
+    for example: "qcom,adreno-306.0", "qcom,adreno"
+  Note that you need to list the less specific "qcom,adreno" (since this
+  is what the device is matched on), in addition to the more specific
+  with the chip-id.
 - reg: Physical base address and length of the controller's registers.
 - interrupts: The interrupt signal from the gpu.
 - clocks: device clocks
@@ -10,8 +14,6 @@ Required properties:
   * "core_clk"
   * "iface_clk"
   * "mem_iface_clk"
-- qcom,chipid: gpu chip-id.  Note this may become optional for future
-  devices if we can reliably read the chipid from hw
 
 Example:
 
@@ -19,7 +21,7 @@ Example:
        ...
 
        gpu: qcom,kgsl-3d0@4300000 {
-               compatible = "qcom,adreno-3xx";
+               compatible = "qcom,adreno-320.2", "qcom,adreno";
                reg = <0x04300000 0x20000>;
                reg-names = "kgsl_3d0_reg_memory";
                interrupts = <GIC_SPI 80 0>;
@@ -32,6 +34,5 @@ Example:
                    <&mmcc GFX3D_CLK>,
                    <&mmcc GFX3D_AHB_CLK>,
                    <&mmcc MMSS_IMEM_AHB_CLK>;
-               qcom,chipid = <0x03020100>;
        };
 };
index 8d54cb764f777483a70f51e8b4ac12af9cf0a719..5fa51a9abc20c7b960ab55df1066d3d1da8d53f0 100644 (file)
@@ -189,6 +189,43 @@ static const struct {
        { "qcom,gpu-quirk-fault-detect-mask", ADRENO_QUIRK_FAULT_DETECT_MASK },
 };
 
+static int find_chipid(struct device *dev, u32 *chipid)
+{
+       struct device_node *node = dev->of_node;
+       const char *compat;
+       int ret;
+
+       /* first search the compat strings for qcom,adreno-XYZ.W: */
+       ret = of_property_read_string_index(node, "compatible", 0, &compat);
+       if (ret == 0) {
+               unsigned rev, patch;
+
+               if (sscanf(compat, "qcom,adreno-%u.%u", &rev, &patch) == 2) {
+                       *chipid = 0;
+                       *chipid |= (rev / 100) << 24;  /* core */
+                       rev %= 100;
+                       *chipid |= (rev / 10) << 16;   /* major */
+                       rev %= 10;
+                       *chipid |= rev << 8;           /* minor */
+                       *chipid |= patch;
+
+                       return 0;
+               }
+       }
+
+       /* and if that fails, fall back to legacy "qcom,chipid" property: */
+       ret = of_property_read_u32(node, "qcom,chipid", chipid);
+       if (ret)
+               return ret;
+
+       dev_warn(dev, "Using legacy qcom,chipid binding!\n");
+       dev_warn(dev, "Use compatible qcom,adreno-%u%u%u.%u instead.\n",
+                       (*chipid >> 24) & 0xff, (*chipid >> 16) & 0xff,
+                       (*chipid >> 8) & 0xff, *chipid & 0xff);
+
+       return 0;
+}
+
 static int adreno_bind(struct device *dev, struct device *master, void *data)
 {
        static struct adreno_platform_config config = {};
@@ -196,7 +233,7 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
        u32 val;
        int ret, i;
 
-       ret = of_property_read_u32(node, "qcom,chipid", &val);
+       ret = find_chipid(dev, &val);
        if (ret) {
                dev_err(dev, "could not find chipid: %d\n", ret);
                return ret;
@@ -262,6 +299,7 @@ static int adreno_remove(struct platform_device *pdev)
 }
 
 static const struct of_device_id dt_match[] = {
+       { .compatible = "qcom,adreno" },
        { .compatible = "qcom,adreno-3xx" },
        /* for backwards compat w/ downstream kgsl DT files: */
        { .compatible = "qcom,kgsl-3d0" },
index e29bb66f55b128a612888e5c11223b3d52e4da5d..6b85c41952529fb6e585703285cd56deedd664d0 100644 (file)
@@ -985,6 +985,7 @@ static int add_display_components(struct device *dev,
  * as components.
  */
 static const struct of_device_id msm_gpu_match[] = {
+       { .compatible = "qcom,adreno" },
        { .compatible = "qcom,adreno-3xx" },
        { .compatible = "qcom,kgsl-3d0" },
        { },