static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
{
- u8 gpio_index, action;
+ u8 gpio_source, gpio_index, action, port;
u16 function, pad;
u32 val;
struct drm_device *dev = intel_dsi->base.base.dev;
gpio_index = *data++;
+ /* gpio source in sequence v2 only */
+ if (dev_priv->vbt.dsi.seq_version == 2)
+ gpio_source = (*data >> 1) & 3;
+ else
+ gpio_source = 0;
+
/* pull up/down */
action = *data++ & 1;
if (dev_priv->vbt.dsi.seq_version >= 3) {
DRM_DEBUG_KMS("GPIO element v3 not supported\n");
goto out;
+ } else {
+ if (gpio_source == 0) {
+ port = IOSF_PORT_GPIO_NC;
+ } else if (gpio_source == 1) {
+ port = IOSF_PORT_GPIO_SC;
+ } else {
+ DRM_DEBUG_KMS("unknown gpio source %u\n", gpio_source);
+ goto out;
+ }
}
function = gtable[gpio_index].function_reg;
if (!gtable[gpio_index].init) {
/* program the function */
/* FIXME: remove constant below */
- vlv_iosf_sb_write(dev_priv, IOSF_PORT_GPIO_NC, function,
- 0x2000CC00);
+ vlv_iosf_sb_write(dev_priv, port, function, 0x2000CC00);
gtable[gpio_index].init = 1;
}
val = 0x4 | action;
/* pull up/down */
- vlv_iosf_sb_write(dev_priv, IOSF_PORT_GPIO_NC, pad, val);
+ vlv_iosf_sb_write(dev_priv, port, pad, val);
mutex_unlock(&dev_priv->sb_lock);
out: