staging: rtl8821ae: Fix typo in rtl8821ae/rtl8821ae.

Fix spelling typo in comment and printk within
rtl8821ae/rtl8821ae.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/dm.c b/drivers/staging/rtl8821ae/rtl8821ae/dm.c
index 8634206b892986b39bb406de189997414a7a5c0e..e0efcd281dfe59bc148633ad1db7df34eacaa26f 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/dm.c
+++ b/drivers/staging/rtl8821ae/rtl8821ae/dm.c
@@ -731,7 +731,7 @@ void rtl8821ae_dm_find_minimum_rssi(struct ieee80211_hw *hw)
                rtl_dm_dig->min_undecorated_pwdb_for_dm =
                    rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
                RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD,
-                        ("AP Ext Port or disconnet PWDB = 0x%x \n",
+                        ("AP Ext Port or disconnect PWDB = 0x%x \n",
                          rtl_dm_dig->min_undecorated_pwdb_for_dm));
        }
        RT_TRACE(COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",
@@ -925,7 +925,7 @@ static void rtl8821ae_dm_dig(struct ieee80211_hw *hw)
 
        if (rtlpriv->falsealm_cnt.cnt_all > 10000) {
                RT_TRACE(COMP_DIG, DBG_LOUD,
-                       ("rtl8821ae_dm_dig(): Abnornally false alarm case. \n"));
+                       ("rtl8821ae_dm_dig(): Abnormally false alarm case. \n"));
 
                if (dm_digtable.large_fa_hit != 3)
                        dm_digtable.large_fa_hit++;
@@ -1087,7 +1087,7 @@ static void rtl8821ae_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
        else
                falsealm_cnt->cnt_all = falsealm_cnt->cnt_ofdm_fail;
 
-       /*reset OFDM FA coutner*/
+       /*reset OFDM FA counter*/
        rtl_set_bbreg(hw, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 1);
        rtl_set_bbreg(hw, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 0);
        /* reset CCK FA counter*/
@@ -1316,7 +1316,7 @@ u8 rtl8812ae_hw_rate_to_mrate(
 /*-----------------------------------------------------------------------------
  * Function:   odm_TxPwrTrackSetPwr88E()
  *
- * Overview:   88E change all channel tx power accordign to flag.
+ * Overview:   88E change all channel tx power according to flag.
  *                             OFDM & CCK are all different.
  *
  * Input:              NONE
@@ -1537,7 +1537,7 @@ void rtl8812ae_dm_txpwr_track_set_pwr(struct ieee80211_hw *hw,
                                        rtldm->modify_txagc_flag_path_b = false;
 
                                        RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
-                                               ("******Path_B pDM_Odm->Modify_TxAGC_Flag = FALSE \n"));
+                                               ("******Path_B dm_Odm->Modify_TxAGC_Flag = FALSE \n"));
                                }
                        }
                }
@@ -1654,7 +1654,7 @@ void rtl8812ae_dm_txpower_tracking_callback_thermalmeter
 
        if (delta > 0 && rtldm->txpower_track_control)
        {
-               /*"delta" here is used to record the absolute value of differrence.*/
+               /*"delta" here is used to record the absolute value of difference.*/
                delta = thermal_value > rtlefuse->eeprom_thermalmeter ? \
                        (thermal_value - rtlefuse->eeprom_thermalmeter) : \
                        (rtlefuse->eeprom_thermalmeter - thermal_value);
@@ -1976,7 +1976,7 @@ void rtl8821ae_phy_lccalibrate(
 /*-----------------------------------------------------------------------------
  * Function:   odm_TxPwrTrackSetPwr88E()
  *
- * Overview:   88E change all channel tx power accordign to flag.
+ * Overview:   88E change all channel tx power according to flag.
  *                             OFDM & CCK are all different.
  *
  * Input:              NONE
@@ -2159,7 +2159,7 @@ void rtl8821ae_dm_txpower_tracking_callback_thermalmeter
        u8 *delta_swing_table_idx_tup_b;
        u8 *delta_swing_table_idx_tdown_b;
 
-       /*2. Initilization ( 7 steps in total )*/
+       /*2. Initialization ( 7 steps in total )*/
        rtl8821ae_get_delta_swing_table(hw, (u8**)&delta_swing_table_idx_tup_a,
                                                                        (u8**)&delta_swing_table_idx_tdown_a,
                                                                          (u8**)&delta_swing_table_idx_tup_b,
@@ -2244,7 +2244,7 @@ void rtl8821ae_dm_txpower_tracking_callback_thermalmeter
 
        if (delta > 0 && rtldm->txpower_track_control)
        {
-               /*"delta" here is used to record the absolute value of differrence.*/
+               /*"delta" here is used to record the absolute value of difference.*/
                delta = thermal_value > rtlefuse->eeprom_thermalmeter ? \
                        (thermal_value - rtlefuse->eeprom_thermalmeter) : \
                        (rtlefuse->eeprom_thermalmeter - thermal_value);
@@ -2613,11 +2613,11 @@ static void rtl8821ae_dm_check_edca_turbo(struct ieee80211_hw *hw)
        RT_TRACE(COMP_TURBO, DBG_LOUD,
                ("rtl8821ae_dm_check_edca_turbo=====>"));
        RT_TRACE(COMP_TURBO, DBG_LOUD,
-               ("Orginial BE PARAM: 0x%x\n",
+               ("Original BE PARAM: 0x%x\n",
                rtl_read_dword(rtlpriv, DM_REG_EDCA_BE_11N)));
 
        /*===============================
-       list paramter for different platform
+       list parameter for different platform
        ===============================*/
        b_last_is_cur_rdl_state = rtlpriv->dm.bis_cur_rdlstate;
        pb_is_cur_rdl_state = &( rtlpriv->dm.bis_cur_rdlstate);
@@ -2963,7 +2963,7 @@ void rtl8821ae_dm_dynamic_atc_switch(struct ieee80211_hw *hw)
                        "Crystal cap = 0x%x, Crystal cap offset = %d\n",
                        rtldm->crystal_cap, adjust_xtal));
 
-               /*3.Adjudt Crystal Cap.*/
+               /*3.Adjust Crystal Cap.*/
                if (adjust_xtal != 0){
                        rtldm->is_freeze = 0;
                        rtldm->crystal_cap += adjust_xtal;

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/fw.c b/drivers/staging/rtl8821ae/rtl8821ae/fw.c
index 4083cab926a342210485e071ace41670ba1dec19..46eb4125d18f6a639f2666513005e91e108a2b9e 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/fw.c
+++ b/drivers/staging/rtl8821ae/rtl8821ae/fw.c
@@ -164,7 +164,7 @@ static int _rtl8821ae_fw_free_to_go(struct ieee80211_hw *hw)
 
        if (counter >= FW_8821AE_POLLING_TIMEOUT_COUNT) {
                RT_TRACE(COMP_ERR, DBG_LOUD,
-                        ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
+                        ("chksum report fail ! REG_MCUFWDL:0x%08x .\n",
                          value32));
                goto exit;
        }
@@ -368,7 +368,7 @@ static void _rtl8821ae_fill_h2c_command(struct ieee80211_hw *hw,
                                wait_h2c_limmit--;
                                if (wait_h2c_limmit == 0) {
                                        RT_TRACE(COMP_CMD, DBG_LOUD,
-                                                ("Wating too long for FW read "
+                                                ("Waiting too long for FW read "
                                                  "clear HMEBox(%d)!\n", boxnum));
                                        break;
                                }
@@ -378,7 +378,7 @@ static void _rtl8821ae_fill_h2c_command(struct ieee80211_hw *hw,
                                isfw_read = _rtl8821ae_check_fw_read_last_h2c(hw, boxnum);
                                u1b_tmp = rtl_read_byte(rtlpriv, 0x130);
                                RT_TRACE(COMP_CMD, DBG_LOUD,
-                                        ("Wating for FW read clear HMEBox(%d)!!! "
+                                        ("Waiting for FW read clear HMEBox(%d)!!! "
                                          "0x130 = %2x\n", boxnum, u1b_tmp));
                        }
                }
@@ -1179,7 +1179,7 @@ void rtl8821ae_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished)
                         ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
 }
 
-/*Shoud check FW support p2p or not.*/
+/*Should check FW support p2p or not.*/
 void rtl8821ae_set_p2p_ctw_period_cmd(struct ieee80211_hw *hw, u8 ctwindow)
 {
        u8 u1_ctwindow_period[1] ={ ctwindow};

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/hal_bt_coexist.h b/drivers/staging/rtl8821ae/rtl8821ae/hal_bt_coexist.h
index 799cc6f95cc159a4ca2dfbff76b6a1df06d9500a..b365f82f481c98f4615b951bcbc188f2083a04c7 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/hal_bt_coexist.h
+++ b/drivers/staging/rtl8821ae/rtl8821ae/hal_bt_coexist.h
@@ -142,7 +142,7 @@ void rtl8821ae_dm_bt_hw_coex_all_off(struct ieee80211_hw *hw);
 long rtl8821ae_dm_bt_get_rx_ss(struct ieee80211_hw *hw);
 void rtl8821ae_dm_bt_balance(struct ieee80211_hw *hw,
                        bool b_balance_on, u8 ms0, u8 ms1);
-void rtl8821ae_dm_bt_agc_table(struct ieee80211_hw *hw, u8 tyep);
+void rtl8821ae_dm_bt_agc_table(struct ieee80211_hw *hw, u8 type);
 void rtl8821ae_dm_bt_bb_back_off_level(struct ieee80211_hw *hw, u8 type);
 u8 rtl8821ae_dm_bt_check_coex_rssi_state(struct ieee80211_hw *hw,
                                                u8      level_num, u8   rssi_thresh, u8 rssi_thresh1);

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/hal_btc.c b/drivers/staging/rtl8821ae/rtl8821ae/hal_btc.c
index 79386ee142f9d272626a414f20cd4b1bd83a2504..6898868ce6e7b0d4a1c9448188300c8385af5bee 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/hal_btc.c
+++ b/drivers/staging/rtl8821ae/rtl8821ae/hal_btc.c
@@ -157,7 +157,7 @@ bool rtl8821ae_dm_bt_is_same_coexist_state(struct ieee80211_hw *hw)
                &&(rtlpcipriv->btcoexist.previous_state_h
                == rtlpcipriv->btcoexist.current_state_h)) {
                RT_TRACE(COMP_BT_COEXIST, DBG_DMESG,
-                               ("[DM][BT], Coexist state do not chang!!\n"));
+                               ("[DM][BT], Coexist state do not change!!\n"));
                return true;
        } else {
                RT_TRACE(COMP_BT_COEXIST, DBG_DMESG,
@@ -902,7 +902,7 @@ void rtl8821ae_dm_bt_set_bt_dm(struct ieee80211_hw *hw, struct btdm_8821ae *p_bt
 
        /*
         * Note:
-        * We should add delay for making sure sw DacSwing can be set sucessfully.
+        * We should add delay for making sure sw DacSwing can be set successfully.
         * because of that rtl8821ae_dm_bt_set_fw_2_ant_hid() and rtl8821ae_dm_bt_set_fw_tdma_ctrl()
         * will overwrite the reg 0x880.
        */

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/hw.c b/drivers/staging/rtl8821ae/rtl8821ae/hw.c
index d3e9b93400bffd8c4b95ca880ca8e09f1fb0d633..1b8583b689d42990aadb0585b4e13ffb0d0dfca5 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/hw.c
+++ b/drivers/staging/rtl8821ae/rtl8821ae/hw.c
@@ -1017,7 +1017,7 @@ static void _rtl8821ae_hw_configure(struct ieee80211_hw *hw)
        /* ARFB table 12 for 11ac 24G 1SS */
        rtl_write_dword(rtlpriv, REG_ARFR3, 0x00000015);
        rtl_write_dword(rtlpriv, REG_ARFR3 + 4, 0xffcff000);
-       /* 0x420[7] = 0 , enable retry AMPDU in new AMPD not singal MPDU. */
+       /* 0x420[7] = 0 , enable retry AMPDU in new AMPD not signal MPDU. */
        rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F00);
        rtl_write_byte(rtlpriv, REG_AMPDU_MAX_TIME, 0x70);
 
@@ -1407,7 +1407,7 @@ int rtl8821ae_hw_init(struct ieee80211_hw *hw)
        rtl8821ae_phy_mac_config(hw);
        /* because last function modify RCR, so we update
         * rcr var here, or TP will unstable for receive_config
-        * is wrong, RX RCR_ACRC32 will cause TP unstabel & Rx
+        * is wrong, RX RCR_ACRC32 will cause TP unstable & Rx
         * RCR_APP_ICV will cause mac80211 unassoc for cisco 1252
        rtlpci->receive_config = rtl_read_dword(rtlpriv, REG_RCR);
        rtlpci->receive_config &= ~(RCR_ACRC32 | RCR_AICV);
@@ -1563,7 +1563,7 @@ static enum version_8821ae _rtl8821ae_read_chip_version(struct ieee80211_hw *hw)
                        break;
                default:
                        RT_TRACE(COMP_INIT, DBG_LOUD,
-                               ("Chip Version ID: Unknow (0x%X).\n", version));
+                               ("Chip Version ID: Unknown (0x%X).\n", version));
                        break;
        }
 
@@ -2372,7 +2372,7 @@ static void _rtl8812ae_read_adapter_info(struct ieee80211_hw *hw, bool b_pseudo_
        if (rtlefuse->eeprom_channelplan == 0xff)
                rtlefuse->eeprom_channelplan = 0x7F;
 
-       /* set channel paln to world wide 13 */
+       /* set channel plan to world wide 13 */
        //rtlefuse->channel_plan = (u8) rtlefuse->eeprom_channelplan;
 
        /*parse xtal*/
@@ -2535,7 +2535,7 @@ static void _rtl8821ae_read_adapter_info(struct ieee80211_hw *hw, bool b_pseudo_
        if (rtlefuse->eeprom_channelplan == 0xff)
                rtlefuse->eeprom_channelplan = 0x7F;
 
-       /* set channel paln to world wide 13 */
+       /* set channel plan to world wide 13 */
        //rtlefuse->channel_plan = (u8) rtlefuse->eeprom_channelplan;
 
        /*parse xtal*/

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/phy.c b/drivers/staging/rtl8821ae/rtl8821ae/phy.c
index d02fca38a2b2e31b981dc4e08087a381d96b35ed..c66129087a6716a4974daf2ab84245f11d7e5223 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/phy.c
+++ b/drivers/staging/rtl8821ae/rtl8821ae/phy.c
@@ -86,7 +86,7 @@ void rtl8812ae_fixspur(
                        /* 0x8AC[11:10] = 2'b10*/
 
 
-               /* <20120914, Kordan> A workarould to resolve
+               /* <20120914, Kordan> A workaround to resolve
                2480Mhz spur by setting ADC clock as 160M. (Asked by Binson)*/
                if (band_width == HT_CHANNEL_WIDTH_20 &&
                        (channel == 13 || channel == 14)) {
@@ -107,7 +107,7 @@ void rtl8812ae_fixspur(
        }
        else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE)
        {
-               /* <20120914, Kordan> A workarould to resolve
+               /* <20120914, Kordan> A workaround to resolve
                2480Mhz spur by setting ADC clock as 160M. (Asked by Binson)*/
                if (band_width == HT_CHANNEL_WIDTH_20 &&
                        (channel == 13 || channel == 14))

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/phy.h b/drivers/staging/rtl8821ae/rtl8821ae/phy.h
index a932d8c9d45d124b83dec84e2b89b58d29f311ed..a80bf739940a1846b80b0e1659ff8391d7dc055c 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/phy.h
+++ b/drivers/staging/rtl8821ae/rtl8821ae/phy.h
@@ -30,7 +30,7 @@
 #ifndef __RTL8821AE_PHY_H__
 #define __RTL8821AE_PHY_H__
 
-/*It must always set to 4, otherwise read efuse table secquence will be wrong.*/
+/*It must always set to 4, otherwise read efuse table sequence will be wrong.*/
 #define MAX_TX_COUNT   4
 #define        TX_1S                   0
 #define        TX_2S                   1

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/pwrseq.h b/drivers/staging/rtl8821ae/rtl8821ae/pwrseq.h
index 8b39c042fa93eb45eb86a1c25da150fecb45c463..480a6bb6d76b79f1df409f84c359b837b5d62ffb 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/pwrseq.h
+++ b/drivers/staging/rtl8821ae/rtl8821ae/pwrseq.h
@@ -81,7 +81,7 @@
        {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */     \
        {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */       \
        {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */    \
-       {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */    \
+       {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 turn on ZCD */    \
        {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */    \
        {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */      \
        {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'11 enable WL suspend for PCIe*/
@@ -91,7 +91,7 @@
        /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
        {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/   \
        {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \
-       {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */      \
+       {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 turn off ZCD */      \
        {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */      \
        {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */        \
        {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */
@@ -110,7 +110,7 @@
        {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */       \
        {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */     \
        {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */    \
-       {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */    \
+       {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 turn on ZCD */    \
        {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/*0x12[0] = 0 force PFM mode */    \
        {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */    \
        {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */      \
@@ -124,7 +124,7 @@
        /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                       \
        {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x12[0] = 1 force PWM mode */ \
        {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */      \
-       {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */      \
+       {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 turn off ZCD */      \
        {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \
        {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */        \
        {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ \
@@ -204,7 +204,7 @@ extern struct wlan_pwr_cfg  rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEP
        4: LPS--Low Power State
        5: SUS--Suspend
 
-       The transision from different states are defined below
+       The transition from different states are defined below
        TRANS_CARDEMU_TO_ACT
        TRANS_ACT_TO_CARDEMU
        TRANS_CARDEMU_TO_SUS

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/pwrseqcmd.c b/drivers/staging/rtl8821ae/rtl8821ae/pwrseqcmd.c
index 710bc015251c72c949e5660c2ad6b6e462bcb5aa..ff18871877707bd6d61b029d63a915ce14461c47 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/pwrseqcmd.c
+++ b/drivers/staging/rtl8821ae/rtl8821ae/pwrseqcmd.c
@@ -82,7 +82,7 @@ bool rtl_hal_pwrseqcmdparsing (struct rtl_priv* rtlpriv, u8 cut_version,
                                        value = value | (GET_PWR_CFG_VALUE(pwr_cfg_cmd)
                                                        & GET_PWR_CFG_MASK(pwr_cfg_cmd));
 
-                                       /*Write the value back to sytem register*/
+                                       /*Write the value back to system register*/
                                        rtl_write_byte(rtlpriv, offset, value);
                                }
                                break;

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/reg.h b/drivers/staging/rtl8821ae/rtl8821ae/reg.h
index 09c5f00d2603c284175cb7f977b40b2cc9dd2685..beffb4243b1e11e6831e4dc627fb2d19d226dca0 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/reg.h
+++ b/drivers/staging/rtl8821ae/rtl8821ae/reg.h
@@ -596,13 +596,13 @@
 #define        IMR_BCNDMAINT3                  BIT(23)         /* Beacon DMA Interrupt 3               */
 #define        IMR_BCNDMAINT2                  BIT(22)         /* Beacon DMA Interrupt 2               */
 #define        IMR_BCNDMAINT1                  BIT(21)         /* Beacon DMA Interrupt 1               */
-#define        IMR_BCNDOK7                             BIT(20)         /* Beacon Queue DMA OK Interrup 7 */
-#define        IMR_BCNDOK6                             BIT(19)         /* Beacon Queue DMA OK Interrup 6 */
-#define        IMR_BCNDOK5                             BIT(18)         /* Beacon Queue DMA OK Interrup 5 */
-#define        IMR_BCNDOK4                             BIT(17)         /* Beacon Queue DMA OK Interrup 4 */
-#define        IMR_BCNDOK3                             BIT(16)         /* Beacon Queue DMA OK Interrup 3 */
-#define        IMR_BCNDOK2                             BIT(15)         /* Beacon Queue DMA OK Interrup 2 */
-#define        IMR_BCNDOK1                             BIT(14)         /* Beacon Queue DMA OK Interrup 1 */
+#define        IMR_BCNDOK7                             BIT(20)         /* Beacon Queue DMA OK Interrupt 7 */
+#define        IMR_BCNDOK6                             BIT(19)         /* Beacon Queue DMA OK Interrupt 6 */
+#define        IMR_BCNDOK5                             BIT(18)         /* Beacon Queue DMA OK Interrupt 5 */
+#define        IMR_BCNDOK4                             BIT(17)         /* Beacon Queue DMA OK Interrupt 4 */
+#define        IMR_BCNDOK3                             BIT(16)         /* Beacon Queue DMA OK Interrupt 3 */
+#define        IMR_BCNDOK2                             BIT(15)         /* Beacon Queue DMA OK Interrupt 2 */
+#define        IMR_BCNDOK1                             BIT(14)         /* Beacon Queue DMA OK Interrupt 1 */
 #define        IMR_ATIMEND_E           BIT(13)         /* ATIM Window End Extension for Win7 */
 #define        IMR_TXERR                               BIT(11)         /* Tx Error Flag Interrupt Status, write 1 clear. */
 #define        IMR_RXERR                               BIT(10)         /* Rx Error Flag INT Status, Write 1 clear */
@@ -613,7 +613,7 @@
 #define        HWSET_MAX_SIZE                          512
 #define   EFUSE_MAX_SECTION                    64
 #define   EFUSE_REAL_CONTENT_LEN                       256
-#define        EFUSE_OOB_PROTECT_BYTES         18      /* PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte.*/
+#define        EFUSE_OOB_PROTECT_BYTES         18      /* PG data exclude header, dummy 7 bytes from CP test and reserved 1byte.*/
 
 
 #define        EEPROM_DEFAULT_TSSI                                     0x0
@@ -1511,7 +1511,7 @@
 #define        ROFDM0_TXCOEFF5                         0xcb4
 #define        ROFDM0_TXCOEFF6                         0xcb8
 
-/*Path_A RFE cotrol */
+/*Path_A RFE control */
 #define        RA_RFE_CTRL_8812                                0xcb8
 /*Path_B RFE control*/
 #define        RB_RFE_CTRL_8812                                0xeb8
@@ -2336,19 +2336,19 @@
 #define                WOL_REASON_DEAUTH                       BIT(3)
 #define                WOL_REASON_FW_DISCONNECT        BIT(4)
 
-#define                RA_RFE_PINMUX   0xcb0  /* Path_A RFE cotrol pinmux*/
+#define                RA_RFE_PINMUX   0xcb0  /* Path_A RFE control pinmux*/
 #define                RB_RFE_PINMUX   0xeb0 /* Path_B RFE control pinmux*/
 
 #define                RA_RFE_INV 0xcb4
 #define                RB_RFE_INV 0xeb4
 
 /* RXIQC */
-#define                RA_RXIQC_AB     0xc10  /*RxIQ imblance matrix coeff. A & B*/
-#define                RA_RXIQC_CD     0xc14  /*RxIQ imblance matrix coeff. C & D*/
+#define                RA_RXIQC_AB     0xc10  /*RxIQ imbalance matrix coeff. A & B*/
+#define                RA_RXIQC_CD     0xc14  /*RxIQ imbalance matrix coeff. C & D*/
 #define                RA_TXSCALE              0xc1c  /* Pah_A TX scaling factor*/
 #define                RB_TXSCALE              0xe1c  /* Path_B TX scaling factor*/
-#define                RB_RXIQC_AB     0xe10  /*RxIQ imblance matrix coeff. A & B*/
-#define                RB_RXIQC_CD     0xe14  /*RxIQ imblance matrix coeff. C & D*/
+#define                RB_RXIQC_AB     0xe10  /*RxIQ imbalance matrix coeff. A & B*/
+#define                RB_RXIQC_CD     0xe14  /*RxIQ imbalance matrix coeff. C & D*/
 #define                RXIQC_AC                0x02ff  /*bit mask for IQC matrix element A & C*/
 #define                RXIQC_BD                0x02ff0000 /*bit mask for IQC matrix element A & C*/
 

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/sw.c b/drivers/staging/rtl8821ae/rtl8821ae/sw.c
index 85a3474fc099a8174d59b5a8ecd02851393e3dad..a8d1755697701321ed0db379df4e43946b3aabf4 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/sw.c
+++ b/drivers/staging/rtl8821ae/rtl8821ae/sw.c
@@ -57,9 +57,9 @@ void rtl8821ae_init_aspm_vars(struct ieee80211_hw *hw)
         * 0 - Disable ASPM,
         * 1 - Enable ASPM without Clock Req,
         * 2 - Enable ASPM with Clock Req,
-        * 3 - Alwyas Enable ASPM with Clock Req,
+        * 3 - Always Enable ASPM with Clock Req,
         * 4 - Always Enable ASPM without Clock Req.
-        * set defult to RTL8192CE:3 RTL8192E:2
+        * set default to RTL8192CE:3 RTL8192E:2
         * */
        rtlpci->const_pci_aspm = 3;
 

diff --git a/drivers/staging/rtl8821ae/rtl8821ae/trx.c b/drivers/staging/rtl8821ae/rtl8821ae/trx.c
index f82ed5143b3e628865841c0762cfa5d3b54a8232..5f3246454e3ee778a7f091c97c6d1129512cbd48 100644 (file)
--- a/drivers/staging/rtl8821ae/rtl8821ae/trx.c
+++ b/drivers/staging/rtl8821ae/rtl8821ae/trx.c
@@ -244,7 +244,7 @@ static void _rtl8821ae_query_rxphystatus(struct ieee80211_hw *hw,
                cck_agc_rpt = cck_buf->cck_agc_rpt;
 
                /* (1)Hardware does not provide RSSI for CCK */
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive) */
                if (ppsc->rfpwr_state == ERFON)
                        cck_highpwr = (u8) rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
@@ -363,7 +363,7 @@ static void _rtl8821ae_query_rxphystatus(struct ieee80211_hw *hw,
                                pstatus->rx_mimo_signalstrength[i] = (u8) rssi;
                }
 
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive) */
                rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
 
@@ -603,7 +603,7 @@ bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw,
 
        /* hw will set status->decrypted true, if it finds the
         * frame is open data frame or mgmt frame. */
-       /* So hw will not decryption robust managment frame
+       /* So hw will not decryption robust management frame
         * for IEEE80211w but still set status->decrypted
         * true, so here we should set it back to undecrypted
         * for IEEE80211w frame, and mac80211 sw will help