drm/i915: Update mi_set_context() to take a request structure

Updated mi_set_context() to take a request structure instead of a ring and
context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 8e52f3c58f61b35edeb45ddcb00c96057c134a60..a9dd7e96306e02bc262d80ba2f6cb9e2fb956946 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -478,10 +478,9 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
 }
 
 static inline int
-mi_set_context(struct intel_engine_cs *ring,
-              struct intel_context *new_context,
-              u32 hw_flags)
+mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 {
+       struct intel_engine_cs *ring = req->ring;
        u32 flags = hw_flags | MI_MM_SPACE_GTT;
        const int num_rings =
                /* Use an extended w/a on ivb+ if signalling from other rings */
@@ -533,7 +532,7 @@ mi_set_context(struct intel_engine_cs *ring,
 
        intel_ring_emit(ring, MI_NOOP);
        intel_ring_emit(ring, MI_SET_CONTEXT);
-       intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->legacy_hw_ctx.rcs_state) |
+       intel_ring_emit(ring, i915_gem_obj_ggtt_offset(req->ctx->legacy_hw_ctx.rcs_state) |
                        flags);
        /*
         * w/a: MI_SET_CONTEXT must always be followed by MI_NOOP
@@ -695,7 +694,7 @@ static int do_switch(struct drm_i915_gem_request *req)
        WARN_ON(needs_pd_load_pre(ring, to) &&
                needs_pd_load_post(ring, to, hw_flags));
 
-       ret = mi_set_context(ring, to, hw_flags);
+       ret = mi_set_context(req, hw_flags);
        if (ret)
                goto unpin_out;