MIPS: Netlogic: Add support for XLP5XX
authorYonghong Song <ysong@broadcom.com>
Tue, 29 Apr 2014 14:37:53 +0000 (20:07 +0530)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 30 May 2014 14:50:38 +0000 (16:50 +0200)
Add support for the XLP5XX processor which is an 8 core variant of the
XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX.

Signed-off-by: Yonghong Song <ysong@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6871/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/cpu.h
arch/mips/include/asm/netlogic/mips-extns.h
arch/mips/include/asm/netlogic/xlp-hal/xlp.h
arch/mips/kernel/cpu-probe.c
arch/mips/netlogic/common/reset.S
arch/mips/netlogic/xlp/dt.c
arch/mips/netlogic/xlp/setup.c
arch/mips/netlogic/xlp/wakeup.c

index 39826a77b9f3f0f72132d8d986f0d29dd74b85f6..129d08701e91c15c3387d2f976b0eb530d3a4f8e 100644 (file)
 #define PRID_IMP_NETLOGIC_XLP3XX       0x1100
 #define PRID_IMP_NETLOGIC_XLP2XX       0x1200
 #define PRID_IMP_NETLOGIC_XLP9XX       0x1500
+#define PRID_IMP_NETLOGIC_XLP5XX       0x1300
 
 /*
  * Particular Revision values for bits 7:0 of the PRId register.
index 38af905bf07ed2cc8109c15da310510bb98befd9..06f1f75bfa9bf0402ec4e802dfefef7a4de723af 100644 (file)
@@ -148,7 +148,8 @@ static inline int nlm_nodeid(void)
 {
        uint32_t prid = read_c0_prid() & PRID_IMP_MASK;
 
-       if (prid == PRID_IMP_NETLOGIC_XLP9XX)
+       if ((prid == PRID_IMP_NETLOGIC_XLP9XX) ||
+                       (prid == PRID_IMP_NETLOGIC_XLP5XX))
                return (__read_32bit_c0_register($15, 1) >> 7) & 0x7;
        else
                return (__read_32bit_c0_register($15, 1) >> 5) & 0x3;
index a11b289956e6483ffb38646f727b7e8ed31fe261..62d19871b9833696aebc417c7afee196ac7dbab8 100644 (file)
@@ -102,14 +102,16 @@ static inline int cpu_is_xlpii(void)
        int chip = read_c0_prid() & PRID_IMP_MASK;
 
        return chip == PRID_IMP_NETLOGIC_XLP2XX ||
-               chip == PRID_IMP_NETLOGIC_XLP9XX;
+               chip == PRID_IMP_NETLOGIC_XLP9XX ||
+               chip == PRID_IMP_NETLOGIC_XLP5XX;
 }
 
 static inline int cpu_is_xlp9xx(void)
 {
        int chip = read_c0_prid() & PRID_IMP_MASK;
 
-       return chip == PRID_IMP_NETLOGIC_XLP9XX;
+       return chip == PRID_IMP_NETLOGIC_XLP9XX ||
+               chip == PRID_IMP_NETLOGIC_XLP5XX;
 }
 #endif /* !__ASSEMBLY__ */
 #endif /* _ASM_NLM_XLP_H */
index e8638c5b7d11709dc8a1f87593dd69c51334b895..f34000b27bf1d068945e6d086721738464b11ba1 100644 (file)
@@ -1059,6 +1059,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
        switch (c->processor_id & PRID_IMP_MASK) {
        case PRID_IMP_NETLOGIC_XLP2XX:
        case PRID_IMP_NETLOGIC_XLP9XX:
+       case PRID_IMP_NETLOGIC_XLP5XX:
                c->cputype = CPU_XLP;
                __cpu_name[cpu] = "Broadcom XLPII";
                break;
index 5b60b469da156cf2c04b1d00821a800b8df22311..701c4bcb9e4777c031e2af542c4abc89e6d6a9f7 100644 (file)
@@ -177,6 +177,10 @@ FEXPORT(nlm_reset_entry)
        beq     t0, t1, 2f              /* does not need to set coherent */
        nop
 
+       li      t1, 0x1300              /* XLP 5xx */
+       beq     t0, t1, 2f              /* does not need to set coherent */
+       nop
+
        /* set bit in SYS coherent register for the core */
        mfc0    t0, CP0_EBASE, 1
        mfc0    t1, CP0_EBASE, 1
index 0b36ac80a232ede16c11061877ab2f12b5dc85c7..bba993a5b1b03b8f7385c18e92ee2085adf9c265 100644 (file)
@@ -51,6 +51,7 @@ void __init *xlp_dt_init(void *fdtp)
                switch (current_cpu_data.processor_id & PRID_IMP_MASK) {
 #ifdef CONFIG_DT_XLP_GVP
                case PRID_IMP_NETLOGIC_XLP9XX:
+               case PRID_IMP_NETLOGIC_XLP5XX:
                        fdtp = __dtb_xlp_gvp_begin;
                        break;
 #endif
index 1ddb62bd354b767ec1a8e4a929db707a4d48d217..4fdd9fd29d1d89e154d82d26e640d98a9baf6776 100644 (file)
@@ -123,6 +123,7 @@ const char *get_system_type(void)
 {
        switch (read_c0_prid() & PRID_IMP_MASK) {
        case PRID_IMP_NETLOGIC_XLP9XX:
+       case PRID_IMP_NETLOGIC_XLP5XX:
        case PRID_IMP_NETLOGIC_XLP2XX:
                return "Broadcom XLPII Series";
        default:
index f4823ad6145fbb66782a3316a7091b23b8cc5cb2..e5f44d2605a83345b552ad89a8577a6e1faba939 100644 (file)
@@ -135,7 +135,15 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
                if (cpu_is_xlp9xx()) {
                        fusebase = nlm_get_fuse_regbase(n);
                        fusemask = nlm_read_reg(fusebase, FUSE_9XX_DEVCFG6);
-                       mask = 0xfffff;
+                       switch (read_c0_prid() & PRID_IMP_MASK) {
+                       case PRID_IMP_NETLOGIC_XLP5XX:
+                               mask = 0xff;
+                               break;
+                       case PRID_IMP_NETLOGIC_XLP9XX:
+                       default:
+                               mask = 0xfffff;
+                               break;
+                       }
                } else {
                        fusemask = nlm_read_sys_reg(nodep->sysbase,
                                                SYS_EFUSE_DEVICE_CFG_STATUS0);