fsldma: Split the MPC83xx event from MPC85xx and refine irq codes.

Split MPC83xx EOCDI event from MPC85xx EOLNI event, which is
also need to update cookie and start the next transfer.
The DMA channel irq handler function code is refined.
The patch is tested on MPC8377MDS board.

Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by; Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 9854ebbaee31b6e85ead0c9b9ec8d1180f2ac934..d8ae18dbf1a795c9c053625ee5b6af408440c43b 100644 (file)
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -696,6 +696,8 @@ static irqreturn_t fsl_dma_chan_do_interrupt(int irq, void *data)
 {
        struct fsl_dma_chan *fsl_chan = (struct fsl_dma_chan *)data;
        u32 stat;
+       int update_cookie = 0;
+       int xfer_ld_q = 0;
 
        stat = get_sr(fsl_chan);
        dev_dbg(fsl_chan->dev, "event: channel %d, stat = 0x%x\n",
@@ -720,8 +722,8 @@ static irqreturn_t fsl_dma_chan_do_interrupt(int irq, void *data)
                         * Now, update the completed cookie, and continue the
                         * next uncompleted transfer.
                         */
-                       fsl_dma_update_completed_cookie(fsl_chan);
-                       fsl_chan_xfer_ld_queue(fsl_chan);
+                       update_cookie = 1;
+                       xfer_ld_q = 1;
                }
                stat &= ~FSL_DMA_SR_PE;
        }
@@ -734,19 +736,33 @@ static irqreturn_t fsl_dma_chan_do_interrupt(int irq, void *data)
                dev_dbg(fsl_chan->dev, "event: clndar %p, nlndar %p\n",
                        (void *)get_cdar(fsl_chan), (void *)get_ndar(fsl_chan));
                stat &= ~FSL_DMA_SR_EOSI;
-               fsl_dma_update_completed_cookie(fsl_chan);
+               update_cookie = 1;
+       }
+
+       /* For MPC8349, EOCDI event need to update cookie
+        * and start the next transfer if it exist.
+        */
+       if (stat & FSL_DMA_SR_EOCDI) {
+               dev_dbg(fsl_chan->dev, "event: End-of-Chain link INT\n");
+               stat &= ~FSL_DMA_SR_EOCDI;
+               update_cookie = 1;
+               xfer_ld_q = 1;
        }
 
        /* If it current transfer is the end-of-transfer,
         * we should clear the Channel Start bit for
         * prepare next transfer.
         */
-       if (stat & (FSL_DMA_SR_EOLNI | FSL_DMA_SR_EOCDI)) {
+       if (stat & FSL_DMA_SR_EOLNI) {
                dev_dbg(fsl_chan->dev, "event: End-of-link INT\n");
                stat &= ~FSL_DMA_SR_EOLNI;
-               fsl_chan_xfer_ld_queue(fsl_chan);
+               xfer_ld_q = 1;
        }
 
+       if (update_cookie)
+               fsl_dma_update_completed_cookie(fsl_chan);
+       if (xfer_ld_q)
+               fsl_chan_xfer_ld_queue(fsl_chan);
        if (stat)
                dev_dbg(fsl_chan->dev, "event: unhandled sr 0x%02x\n",
                                        stat);