drm/amd/powerplay: add a new register define for APU in VI.
authorRex Zhu <Rex.Zhu@amd.com>
Fri, 17 Mar 2017 08:21:55 +0000 (16:21 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:54:06 +0000 (23:54 -0400)
the ixcurrent_pg_status addr is different between APU and DGPU.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_d.h

index 07aa2451aaebce6da897f12512886a3f00c4d1ac..5679a4249bd97f479879ab0ddfd4f3bb3e7c4191 100644 (file)
@@ -1068,8 +1068,12 @@ static void uvd_v6_0_get_clockgating_state(void *handle, u32 *flags)
 
        mutex_lock(&adev->pm.mutex);
 
-       if (RREG32_SMC(ixCURRENT_PG_STATUS) &
-                               CURRENT_PG_STATUS__UVD_PG_STATUS_MASK) {
+       if (adev->flags & AMD_IS_APU)
+               data = RREG32_SMC(ixCURRENT_PG_STATUS_APU);
+       else
+               data = RREG32_SMC(ixCURRENT_PG_STATUS);
+
+       if (data & CURRENT_PG_STATUS__UVD_PG_STATUS_MASK) {
                DRM_INFO("Cannot get clockgating state when UVD is powergated.\n");
                goto out;
        }
index 97ff9adb2499609ed8ea63be606f5ba030e9cfd1..db0adac073c61a440948523d1f397a22be6cef99 100644 (file)
@@ -783,8 +783,12 @@ static void vce_v3_0_get_clockgating_state(void *handle, u32 *flags)
 
        mutex_lock(&adev->pm.mutex);
 
-       if (RREG32_SMC(ixCURRENT_PG_STATUS) &
-                       CURRENT_PG_STATUS__VCE_PG_STATUS_MASK) {
+       if (adev->flags & AMD_IS_APU)
+               data = RREG32_SMC(ixCURRENT_PG_STATUS_APU);
+       else
+               data = RREG32_SMC(ixCURRENT_PG_STATUS);
+
+       if (data & CURRENT_PG_STATUS__VCE_PG_STATUS_MASK) {
                DRM_INFO("Cannot get clockgating state when VCE is powergated.\n");
                goto out;
        }
index 4446d43d2a8fbb5f326afff33805f4377950e535..bd3685166779e898d3b1729e8088c654ab8d97fc 100644 (file)
 #define ixROM_SW_DATA_63                                                        0xc0600120
 #define ixROM_SW_DATA_64                                                        0xc0600124
 #define ixCURRENT_PG_STATUS                                                     0xc020029c
+#define ixCURRENT_PG_STATUS_APU                                                 0xd020029c
 
 #endif /* SMU_7_1_2_D_H */
index 0333d880bc9ebd021c905ed0d0091ff596c24f7c..b89347ed1a4034d42ae8bf9806cb8fefd6d1dff8 100644 (file)
 #define ixGC_CAC_ACC_CU15                                                       0xc9
 #define ixGC_CAC_OVRD_CU                                                        0xe7
 #define ixCURRENT_PG_STATUS                                                     0xc020029c
+#define ixCURRENT_PG_STATUS_APU                                                 0xd020029c
+
 #endif /* SMU_7_1_3_D_H */