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ath9k_hw: Fix init mode register regression
authorRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Fri, 26 Aug 2011 07:12:11 +0000 (12:42 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 29 Aug 2011 18:26:31 +0000 (14:26 -0400)
The commit 172805ad46b78717a738ca5c7908c68f0326d3a9
overwirtes additional clock settings of AR9330 to
all AR9300 chips.

Cc: stable@kernel.org
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_phy.c patch | blob | blame | history

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 1baca8e4715d9ad62e97c8ef8b9e0b4ec431f240..fcafec0605f41e94679c889e092fcc56b6eb9748 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -671,7 +671,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
                REG_WRITE_ARRAY(&ah->iniModesAdditional,
                                modesIndex, regWrites);
 
-       if (AR_SREV_9300(ah))
+       if (AR_SREV_9330(ah))
                REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
 
        if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)