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ARM: dts: UniPhier: add on-chip UART device nodes
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Fri, 10 Jul 2015 04:53:59 +0000 (13:53 +0900)
committerOlof Johansson <olof@lixom.net>
Tue, 14 Jul 2015 09:21:43 +0000 (11:21 +0200)
The UniPhier on-chip UART driver was merged into the mainline by
commit 1a8d2903cb6a ("serial: 8250_uniphier: add UniPhier serial
driver").

Add device nodes to make it really available.

We no longer have to depend on the on-board UART device (16550A),
so let's change the chosen and aliases to point to the on-chip ones.
Also, turn on the on-board Ethernet device.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts patch | blob | blame | history
arch/arm/boot/dts/uniphier-ph1-ld4.dtsi patch | blob | blame | history
arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts patch | blob | blame | history
arch/arm/boot/dts/uniphier-ph1-pro4.dtsi patch | blob | blame | history
arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts patch | blob | blame | history
arch/arm/boot/dts/uniphier-ph1-sld3.dtsi patch | blob | blame | history
arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts patch | blob | blame | history
arch/arm/boot/dts/uniphier-ph1-sld8.dtsi patch | blob | blame | history

diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
index 200b0c99ed34a8b0b9ebdd5628ca6a608d96b2f9..0cd385a9949f0413f694a831fed3bf030fa13171 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
@@ -57,11 +57,14 @@
 
        chosen {
                bootargs = "console=ttyS0,115200";
-               stdout-path = &serialsc;
+               stdout-path = &serial0;
        };
 
        aliases {
-               serial0 = &serialsc;
+               serial0 = &serial0;
+               serial1 = &serial1;
+               serial2 = &serial2;
+               serial3 = &serial3;
        };
 };
 
@@ -74,6 +77,18 @@
        ranges = <0x00000000 1 0x03f00000 0x00100000>;
 };
 
-&serialsc {
+&ethsc {
        interrupts = <0 49 4>;
 };
+
+&serial0 {
+       status = "okay";
+};
+
+&serial2 {
+       status = "okay";
+};
+
+&serial3 {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index 6a34c56e46935f2deaf34acd91a9bdb75488cfe0..1261e6d3447349ada018667b4755641958950aec 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -64,6 +64,12 @@
                        compatible = "fixed-clock";
                        clock-frequency = <50000000>;
                };
+
+               uart_clk: uart_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <36864000>;
+               };
        };
 
        soc {
@@ -79,6 +85,42 @@
                        #size-cells = <1>;
                };
 
+               serial0: serial@54006800 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006800 0x40>;
+                       interrupts = <0 33 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial1: serial@54006900 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006900 0x40>;
+                       interrupts = <0 35 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial2: serial@54006a00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006a00 0x40>;
+                       interrupts = <0 37 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial3: serial@54006b00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006b00 0x40>;
+                       interrupts = <0 29 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
index d891135a70c2642d8ed4f050850e3cb416157ff2..0951cbf19ea639cce0d5634fcceff9cd0880ad77 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
@@ -57,11 +57,14 @@
 
        chosen {
                bootargs = "console=ttyS0,115200";
-               stdout-path = &serialsc;
+               stdout-path = &serial0;
        };
 
        aliases {
-               serial0 = &serialsc;
+               serial0 = &serial0;
+               serial1 = &serial1;
+               serial2 = &serial2;
+               serial3 = &serial3;
        };
 };
 
@@ -74,6 +77,18 @@
        ranges = <0x00000000 1 0x03f00000 0x00100000>;
 };
 
-&serialsc {
+&ethsc {
        interrupts = <0 50 4>;
 };
+
+&serial0 {
+       status = "okay";
+};
+
+&serial1 {
+       status = "okay";
+};
+
+&serial2 {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index dc633603aed26b05ebcf9c6ba2e47d4d25f581f9..acd2c06dcc085152350661d6f8215e95c52f966e 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -71,6 +71,12 @@
                        compatible = "fixed-clock";
                        clock-frequency = <50000000>;
                };
+
+               uart_clk: uart_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <73728000>;
+               };
        };
 
        soc {
@@ -86,6 +92,42 @@
                        #size-cells = <1>;
                };
 
+               serial0: serial@54006800 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006800 0x40>;
+                       interrupts = <0 33 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial1: serial@54006900 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006900 0x40>;
+                       interrupts = <0 35 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial2: serial@54006a00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006a00 0x40>;
+                       interrupts = <0 37 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial3: serial@54006b00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006b00 0x40>;
+                       interrupts = <0 29 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
index 3ea64ae009e946460eeb4fbe385b20c3e3e5283c..47a44daa8f229833f37e0ba67f39cf515095caca 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
@@ -58,11 +58,13 @@
 
        chosen {
                bootargs = "console=ttyS0,115200";
-               stdout-path = &serialsc;
+               stdout-path = &serial0;
        };
 
        aliases {
-               serial0 = &serialsc;
+               serial0 = &serial0;
+               serial1 = &serial1;
+               serial2 = &serial2;
        };
 };
 
@@ -75,6 +77,18 @@
        ranges = <0x00000000 1 0x03f00000 0x00100000>;
 };
 
-&serialsc {
+&ethsc {
        interrupts = <0 49 4>;
 };
+
+&serial0 {
+       status = "okay";
+};
+
+&serial1 {
+       status = "okay";
+};
+
+&serial2 {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index 248b1886834f02016bd563e1be5fe416b7e5dfb4..feb253b90fb983624e054feb7385ff13ac9e92f6 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -71,6 +71,12 @@
                        compatible = "fixed-clock";
                        clock-frequency = <50000000>;
                };
+
+               uart_clk: uart_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <36864000>;
+               };
        };
 
        soc {
@@ -108,6 +114,33 @@
                              <0x20000100 0x100>;
                };
 
+               serial0: serial@54006800 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006800 0x40>;
+                       interrupts = <0 33 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial1: serial@54006900 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006900 0x40>;
+                       interrupts = <0 35 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial2: serial@54006a00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006a00 0x40>;
+                       interrupts = <0 37 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
index dcdc4f74387da00b86622cfe5694b51440c87dea..07e93a9999c58ddeff56f4c5954f7b45f8f2beb1 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
@@ -57,11 +57,14 @@
 
        chosen {
                bootargs = "console=ttyS0,115200";
-               stdout-path = &serialsc;
+               stdout-path = &serial0;
        };
 
        aliases {
-               serial0 = &serialsc;
+               serial0 = &serial0;
+               serial1 = &serial1;
+               serial2 = &serial2;
+               serial3 = &serial3;
        };
 };
 
@@ -74,6 +77,18 @@
        ranges = <0x00000000 1 0x03f00000 0x00100000>;
 };
 
-&serialsc {
+&ethsc {
        interrupts = <0 48 4>;
 };
+
+&serial0 {
+       status = "okay";
+};
+
+&serial2 {
+       status = "okay";
+};
+
+&serial3 {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index baa71e1febb8226eeb90cc261ea5e45ccd364bfd..bf0c8c1d4c337d85c28586501e155d53c3324b3b 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -64,6 +64,12 @@
                        compatible = "fixed-clock";
                        clock-frequency = <50000000>;
                };
+
+               uart_clk: uart_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <80000000>;
+               };
        };
 
        soc {
@@ -79,6 +85,42 @@
                        #size-cells = <1>;
                };
 
+               serial0: serial@54006800 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006800 0x40>;
+                       interrupts = <0 33 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial1: serial@54006900 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006900 0x40>;
+                       interrupts = <0 35 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial2: serial@54006a00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006a00 0x40>;
+                       interrupts = <0 37 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
+               serial3: serial@54006b00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006b00 0x40>;
+                       interrupts = <0 29 4>;
+                       clocks = <&uart_clk>;
+                       fifo-size = <64>;
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";