powerpc: Fix handling of alignment interrupt on dcbz instruction

This fixes the emulation of the dcbz instruction in the alignment
interrupt handler.  The error was that we were comparing just the
instruction type field of op.type rather than the whole thing,
and therefore the comparison "type != CACHEOP + DCBZ" was always
true.

Fixes: 31bfdb036f12 ("powerpc: Use instruction emulation infrastructure to handle alignment faults")
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Tested-by: Michal Sojka <sojkam1@fel.cvut.cz>
Tested-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 26b9994d27eef9c806b5c1f683f10325aff85d1c..43ef2515648098f985ff5f7d10a66b2f6d724391 100644 (file)
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -341,7 +341,7 @@ int fix_alignment(struct pt_regs *regs)
 
        type = op.type & INSTR_TYPE_MASK;
        if (!OP_IS_LOAD_STORE(type)) {
-               if (type != CACHEOP + DCBZ)
+               if (op.type != CACHEOP + DCBZ)
                        return -EINVAL;
                PPC_WARN_ALIGNMENT(dcbz, regs);
                r = emulate_dcbz(op.ea, regs);