drm/amdgpu: impl sriov detection for vega10
authorXiangliang Yu <Xiangliang.Yu@amd.com>
Wed, 8 Mar 2017 07:00:48 +0000 (15:00 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:54:57 +0000 (23:54 -0400)
Read vega10 hw register to detect if sriov is enabled, and call
it before IP blocks setting.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h
drivers/gpu/drm/amd/amdgpu/soc15.c

index f517e9a8ce617096163f17367a95676667e1a7db..902187206c86d3361beaaa6fcb8b271e549259f0 100644 (file)
@@ -231,3 +231,21 @@ int nbio_v6_1_init(struct amdgpu_device *adev)
 
        return 0;
 }
+
+void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev)
+{
+       uint32_t reg;
+
+       reg = RREG32(SOC15_REG_OFFSET(NBIO, 0,
+                                     mmRCC_PF_0_0_RCC_IOV_FUNC_IDENTIFIER));
+       if (reg & 1)
+               adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;
+
+       if (reg & 0x80000000)
+               adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
+
+       if (!reg) {
+               if (is_virtual_machine())       /* passthrough mode exclus sriov mod */
+                       adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE;
+       }
+}
index a778d1c1fb9fafee11204691265b352c38e38926..3e04093539f58ef2e66ac716ef65126f15d74c3c 100644 (file)
@@ -48,5 +48,6 @@ void nbio_v6_1_ih_control(struct amdgpu_device *adev);
 u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev);
 void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable);
 void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable);
+void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev);
 
 #endif
index 11e09d8458d91349f909a71ef7543374693f57be..ccbecc8d0b47843d4216f9de2e5663ff51234e15 100644 (file)
@@ -469,6 +469,8 @@ static const struct amdgpu_ip_block_version vega10_common_ip_block =
 
 int soc15_set_ip_blocks(struct amdgpu_device *adev)
 {
+       nbio_v6_1_detect_hw_virt(adev);
+
        switch (adev->asic_type) {
        case CHIP_VEGA10:
                amdgpu_ip_block_add(adev, &vega10_common_ip_block);