usb: musb: cppi41: decrease indentation level

no functional changes, clean up only.

Signed-off-by: Felipe Balbi <balbi@ti.com>

diff --git a/drivers/usb/musb/musb_cppi41.c b/drivers/usb/musb/musb_cppi41.c
index be84562d021b8c401f981c7f7a5a7c4551cd16bc..73ac9835485d617456dd98d6c4019ac803e71fef 100644 (file)
--- a/drivers/usb/musb/musb_cppi41.c
+++ b/drivers/usb/musb/musb_cppi41.c
@@ -225,10 +225,12 @@ static void cppi41_dma_callback(void *private_data)
        struct dma_channel *channel = private_data;
        struct cppi41_dma_channel *cppi41_channel = channel->private_data;
        struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
+       struct cppi41_dma_controller *controller;
        struct musb *musb = hw_ep->musb;
        unsigned long flags;
        struct dma_tx_state txstate;
        u32 transferred;
+       int is_hs = 0;
        bool empty;
 
        spin_lock_irqsave(&musb->lock, flags);
@@ -251,58 +253,58 @@ static void cppi41_dma_callback(void *private_data)
        empty = musb_is_tx_fifo_empty(hw_ep);
        if (empty) {
                cppi41_trans_done(cppi41_channel);
-       } else {
-               struct cppi41_dma_controller *controller;
-               int is_hs = 0;
-               /*
-                * On AM335x it has been observed that the TX interrupt fires
-                * too early that means the TXFIFO is not yet empty but the DMA
-                * engine says that it is done with the transfer. We don't
-                * receive a FIFO empty interrupt so the only thing we can do is
-                * to poll for the bit. On HS it usually takes 2us, on FS around
-                * 110us - 150us depending on the transfer size.
-                * We spin on HS (no longer than than 25us and setup a timer on
-                * FS to check for the bit and complete the transfer.
-                */
-               controller = cppi41_channel->controller;
+               goto out;
+       }
 
-               if (is_host_active(musb)) {
-                       if (musb->port1_status & USB_PORT_STAT_HIGH_SPEED)
-                               is_hs = 1;
-               } else {
-                       if (musb->g.speed == USB_SPEED_HIGH)
-                               is_hs = 1;
-               }
-               if (is_hs) {
-                       unsigned wait = 25;
-
-                       do {
-                               empty = musb_is_tx_fifo_empty(hw_ep);
-                               if (empty)
-                                       break;
-                               wait--;
-                               if (!wait)
-                                       break;
-                               udelay(1);
-                       } while (1);
+       /*
+        * On AM335x it has been observed that the TX interrupt fires
+        * too early that means the TXFIFO is not yet empty but the DMA
+        * engine says that it is done with the transfer. We don't
+        * receive a FIFO empty interrupt so the only thing we can do is
+        * to poll for the bit. On HS it usually takes 2us, on FS around
+        * 110us - 150us depending on the transfer size.
+        * We spin on HS (no longer than than 25us and setup a timer on
+        * FS to check for the bit and complete the transfer.
+        */
+       controller = cppi41_channel->controller;
+
+       if (is_host_active(musb)) {
+               if (musb->port1_status & USB_PORT_STAT_HIGH_SPEED)
+                       is_hs = 1;
+       } else {
+               if (musb->g.speed == USB_SPEED_HIGH)
+                       is_hs = 1;
+       }
+       if (is_hs) {
+               unsigned wait = 25;
 
+               do {
                        empty = musb_is_tx_fifo_empty(hw_ep);
-                       if (empty) {
-                               cppi41_trans_done(cppi41_channel);
-                               goto out;
-                       }
+                       if (empty)
+                               break;
+                       wait--;
+                       if (!wait)
+                               break;
+                       udelay(1);
+               } while (1);
+
+               empty = musb_is_tx_fifo_empty(hw_ep);
+               if (empty) {
+                       cppi41_trans_done(cppi41_channel);
+                       goto out;
                }
-               list_add_tail(&cppi41_channel->tx_check,
-                               &controller->early_tx_list);
-               if (!hrtimer_is_queued(&controller->early_tx)) {
-                       unsigned long usecs = cppi41_channel->total_len / 10;
+       }
+       list_add_tail(&cppi41_channel->tx_check,
+                       &controller->early_tx_list);
+       if (!hrtimer_is_queued(&controller->early_tx)) {
+               unsigned long usecs = cppi41_channel->total_len / 10;
 
-                       hrtimer_start_range_ns(&controller->early_tx,
+               hrtimer_start_range_ns(&controller->early_tx,
                                ktime_set(0, usecs * NSEC_PER_USEC),
                                20 * NSEC_PER_USEC,
                                HRTIMER_MODE_REL);
-               }
        }
+
 out:
        spin_unlock_irqrestore(&musb->lock, flags);
 }