Documentation: gpio: Add APM X-Gene SoC GPIO controller DTS binding

Documentation for APM X-Gene SoC GPIO controller DTS binding.

Signed-off-by: Feng Kan <fkan@apm.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene.txt
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+APM X-Gene SoC GPIO controller bindings
+
+This is a gpio controller that is part of the flash controller.
+This gpio controller controls a total of 48 gpios.
+
+Required properties:
+- compatible: "apm,xgene-gpio" for X-Gene GPIO controller
+- reg: Physical base address and size of the controller's registers
+- #gpio-cells: Should be two.
+       - first cell is the pin number
+       - second cell is used to specify the gpio polarity:
+               0 = active high
+               1 = active low
+- gpio-controller: Marks the device node as a GPIO controller.
+
+Example:
+       gpio0: gpio0@1701c000 {
+               compatible = "apm,xgene-gpio";
+               reg = <0x0 0x1701c000 0x0 0x40>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };