MIPS: ath25: add UART support
authorSergey Ryazanov <ryazanov.s.a@gmail.com>
Tue, 28 Oct 2014 23:18:43 +0000 (03:18 +0400)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 24 Nov 2014 06:45:27 +0000 (07:45 +0100)
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8242/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/ath25/ar2315.c
arch/mips/ath25/ar2315.h
arch/mips/ath25/ar5312.c
arch/mips/ath25/ar5312.h
arch/mips/ath25/devices.c
arch/mips/ath25/devices.h

index d92aa91ae75dd8467c8afdd1d5d3d4a08fddfe8d..d10eac4cd828c6395253877b91174384610d69f1 100644 (file)
@@ -267,3 +267,11 @@ void __init ar2315_plat_mem_setup(void)
 
        _machine_restart = ar2315_restart;
 }
+
+void __init ar2315_arch_init(void)
+{
+       unsigned irq = irq_create_mapping(ar2315_misc_irq_domain,
+                                         AR2315_MISC_IRQ_UART0);
+
+       ath25_serial_setup(AR2315_UART0_BASE, irq, ar2315_apb_frequency());
+}
index da5b843dd3a65e0520ed7aa819bdd0bfe951f963..4af5f4c75f44a54f53f3c90cff0f733b3a71a416 100644 (file)
@@ -6,12 +6,14 @@
 void ar2315_arch_init_irq(void);
 void ar2315_plat_time_init(void);
 void ar2315_plat_mem_setup(void);
+void ar2315_arch_init(void);
 
 #else
 
 static inline void ar2315_arch_init_irq(void) {}
 static inline void ar2315_plat_time_init(void) {}
 static inline void ar2315_plat_mem_setup(void) {}
+static inline void ar2315_arch_init(void) {}
 
 #endif
 
index b99a02a9e20e92f7541a26478f4b54ac130719ff..398d4fd4dd2dc4da12e4fedf415565017fedb00d 100644 (file)
@@ -265,3 +265,11 @@ void __init ar5312_plat_mem_setup(void)
 
        _machine_restart = ar5312_restart;
 }
+
+void __init ar5312_arch_init(void)
+{
+       unsigned irq = irq_create_mapping(ar5312_misc_irq_domain,
+                                         AR5312_MISC_IRQ_UART0);
+
+       ath25_serial_setup(AR5312_UART0_BASE, irq, ar5312_sys_frequency());
+}
index 254f04f371b51b66a64f73c6f6d05cc9af4929d0..86dfc6d04a6d83b830367e8f244398ebd3029404 100644 (file)
@@ -6,12 +6,14 @@
 void ar5312_arch_init_irq(void);
 void ar5312_plat_time_init(void);
 void ar5312_plat_mem_setup(void);
+void ar5312_arch_init(void);
 
 #else
 
 static inline void ar5312_arch_init_irq(void) {}
 static inline void ar5312_plat_time_init(void) {}
 static inline void ar5312_plat_mem_setup(void) {}
+static inline void ar5312_arch_init(void) {}
 
 #endif
 
index 049ab4477954e621ec7467eafb69fbfd0b5ebc22..400419d8e7d956fd573eea6ddeb33d077cfee2c0 100644 (file)
@@ -1,10 +1,41 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/serial_8250.h>
 #include <asm/bootinfo.h>
 
 #include "devices.h"
+#include "ar5312.h"
+#include "ar2315.h"
 
 const char *get_system_type(void)
 {
        return "Atheros (unknown)";
 }
+
+void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk)
+{
+       struct uart_port s;
+
+       memset(&s, 0, sizeof(s));
+
+       s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP;
+       s.iotype = UPIO_MEM32;
+       s.irq = irq;
+       s.regshift = 2;
+       s.mapbase = mapbase;
+       s.uartclk = uartclk;
+
+       early_serial_setup(&s);
+}
+
+static int __init ath25_arch_init(void)
+{
+       if (is_ar5312())
+               ar5312_arch_init();
+       else
+               ar2315_arch_init();
+
+       return 0;
+}
+
+arch_initcall(ath25_arch_init);
index 2985586a0f2cc5c63f5201357c72878c2bfa7448..23b53cb71c72eb06a1f83641192916125c9aa3bf 100644 (file)
@@ -9,6 +9,8 @@
 
 extern void (*ath25_irq_dispatch)(void);
 
+void ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk);
+
 static inline bool is_ar2315(void)
 {
        return (current_cpu_data.cputype == CPU_4KEC);