ARM: dts: omap4+: Add DMM bindings
authorArchit Taneja <archit@ti.com>
Tue, 17 Dec 2013 10:02:21 +0000 (15:32 +0530)
committerBenoit Cousson <bcousson@baylibre.com>
Sun, 2 Mar 2014 20:26:27 +0000 (21:26 +0100)
Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 and DRA7x devices.
DMM only requires address and irq information.

Add documentation for the DMM bindings.

Originally worked on by Andy Gross <andygro@gmail.com>

Cc: Andy Gross <andygro@gmail.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Documentation/devicetree/bindings/arm/omap/dmm.txt [new file with mode: 0644]
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap5.dtsi

diff --git a/Documentation/devicetree/bindings/arm/omap/dmm.txt b/Documentation/devicetree/bindings/arm/omap/dmm.txt
new file mode 100644 (file)
index 0000000..8bd6d0a
--- /dev/null
@@ -0,0 +1,22 @@
+OMAP Dynamic Memory Manager (DMM) bindings
+
+The dynamic memory manager (DMM) is a module located immediately in front of the
+SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
+accesses such as priority generation amongst initiators, configuration of SDRAM
+interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
+translation for initiators which need contiguous dma bus addresses.
+
+Required properties:
+- compatible:  Should contain "ti,omap4-dmm" for OMAP4 family
+               Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
+- reg:         Contains DMM register address range (base address and length)
+- interrupts:  Should contain an interrupt-specifier for DMM_IRQ.
+- ti,hwmods:   Name of the hwmod associated to DMM, which is typically "dmm"
+
+Example:
+
+dmm@4e000000 {
+       compatible = "ti,omap4-dmm";
+       reg = <0x4e000000 0x800>;
+       ti,hwmods = "dmm";
+};
index 1fd75aa4639da23c8e1b05bd1c5e28730f01c791..6e89630f80227e70d02be0359222f09deca9e39d 100644 (file)
                        ti,hwmods = "wd_timer2";
                };
 
+               dmm@4e000000 {
+                       compatible = "ti,omap5-dmm";
+                       reg = <0x4e000000 0x800>;
+                       interrupts = <0 113 0x4>;
+                       ti,hwmods = "dmm";
+               };
+
                i2c1: i2c@48070000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x48070000 0x100>;
index d3f8a6e8ca205ef1585c279c1ce50dc8703fa6b5..1b4f59bed0f5a3e1a97d64ba6deadb43354d1a80 100644 (file)
                        ti,hwmods = "kbd";
                };
 
+               dmm@4e000000 {
+                       compatible = "ti,omap4-dmm";
+                       reg = <0x4e000000 0x800>;
+                       interrupts = <0 113 0x4>;
+                       ti,hwmods = "dmm";
+               };
+
                emif1: emif@4c000000 {
                        compatible = "ti,emif-4d";
                        reg = <0x4c000000 0x100>;
index a72813a9663eccd7075b185489cbda4694fd0003..4c3e9f1254755f6e3143da07bb9f72c6f0a595dc 100644 (file)
                        ti,hwmods = "wd_timer2";
                };
 
+               dmm@4e000000 {
+                       compatible = "ti,omap5-dmm";
+                       reg = <0x4e000000 0x800>;
+                       interrupts = <0 113 0x4>;
+                       ti,hwmods = "dmm";
+               };
+
                emif1: emif@4c000000 {
                        compatible      = "ti,emif-4d5";
                        ti,hwmods       = "emif1";