drm/radeon: separate vblank and pflip crtc handling
authorChristian König <christian.koenig@amd.com>
Tue, 27 May 2014 14:49:21 +0000 (16:49 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 2 Jun 2014 14:25:12 +0000 (10:25 -0400)
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/cik.c
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/radeon_display.c
drivers/gpu/drm/radeon/radeon_mode.h
drivers/gpu/drm/radeon/rs600.c
drivers/gpu/drm/radeon/si.c

index 8d0f1774efbc3f417d45fc2f32a717f0c0548731..a5181404f130f4ab181e5b59ef7fb724dc90d304 100644 (file)
@@ -7314,7 +7314,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[0]))
-                                               radeon_crtc_handle_flip(rdev, 0);
+                                               radeon_crtc_handle_vblank(rdev, 0);
                                        rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D1 vblank\n");
                                }
@@ -7340,7 +7340,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[1]))
-                                               radeon_crtc_handle_flip(rdev, 1);
+                                               radeon_crtc_handle_vblank(rdev, 1);
                                        rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D2 vblank\n");
                                }
@@ -7366,7 +7366,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[2]))
-                                               radeon_crtc_handle_flip(rdev, 2);
+                                               radeon_crtc_handle_vblank(rdev, 2);
                                        rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D3 vblank\n");
                                }
@@ -7392,7 +7392,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[3]))
-                                               radeon_crtc_handle_flip(rdev, 3);
+                                               radeon_crtc_handle_vblank(rdev, 3);
                                        rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D4 vblank\n");
                                }
@@ -7418,7 +7418,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[4]))
-                                               radeon_crtc_handle_flip(rdev, 4);
+                                               radeon_crtc_handle_vblank(rdev, 4);
                                        rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D5 vblank\n");
                                }
@@ -7444,7 +7444,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[5]))
-                                               radeon_crtc_handle_flip(rdev, 5);
+                                               radeon_crtc_handle_vblank(rdev, 5);
                                        rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D6 vblank\n");
                                }
index 336f0a56edce42b489f318648f783e669d407b0e..0318230ef2740b19b7a69e5c282a640799765685 100644 (file)
@@ -4789,7 +4789,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[0]))
-                                               radeon_crtc_handle_flip(rdev, 0);
+                                               radeon_crtc_handle_vblank(rdev, 0);
                                        rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D1 vblank\n");
                                }
@@ -4815,7 +4815,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[1]))
-                                               radeon_crtc_handle_flip(rdev, 1);
+                                               radeon_crtc_handle_vblank(rdev, 1);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D2 vblank\n");
                                }
@@ -4841,7 +4841,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[2]))
-                                               radeon_crtc_handle_flip(rdev, 2);
+                                               radeon_crtc_handle_vblank(rdev, 2);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D3 vblank\n");
                                }
@@ -4867,7 +4867,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[3]))
-                                               radeon_crtc_handle_flip(rdev, 3);
+                                               radeon_crtc_handle_vblank(rdev, 3);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D4 vblank\n");
                                }
@@ -4893,7 +4893,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[4]))
-                                               radeon_crtc_handle_flip(rdev, 4);
+                                               radeon_crtc_handle_vblank(rdev, 4);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D5 vblank\n");
                                }
@@ -4919,7 +4919,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[5]))
-                                               radeon_crtc_handle_flip(rdev, 5);
+                                               radeon_crtc_handle_vblank(rdev, 5);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D6 vblank\n");
                                }
index 52548f7bbb5ac622854f10974ed08467f8a7c14b..ad99813cfa8fcae37ee559793d02702db7174c17 100644 (file)
@@ -779,7 +779,7 @@ int r100_irq_process(struct radeon_device *rdev)
                                wake_up(&rdev->irq.vblank_queue);
                        }
                        if (atomic_read(&rdev->irq.pflip[0]))
-                               radeon_crtc_handle_flip(rdev, 0);
+                               radeon_crtc_handle_vblank(rdev, 0);
                }
                if (status & RADEON_CRTC2_VBLANK_STAT) {
                        if (rdev->irq.crtc_vblank_int[1]) {
@@ -788,7 +788,7 @@ int r100_irq_process(struct radeon_device *rdev)
                                wake_up(&rdev->irq.vblank_queue);
                        }
                        if (atomic_read(&rdev->irq.pflip[1]))
-                               radeon_crtc_handle_flip(rdev, 1);
+                               radeon_crtc_handle_vblank(rdev, 1);
                }
                if (status & RADEON_FP_DETECT_STAT) {
                        queue_hotplug = true;
index 6e887d004ebad7041e2080af850cc6ac2a12367d..436e55092e9d1fa3c985c382727e4cde1816970f 100644 (file)
@@ -3876,7 +3876,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[0]))
-                                               radeon_crtc_handle_flip(rdev, 0);
+                                               radeon_crtc_handle_vblank(rdev, 0);
                                        rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D1 vblank\n");
                                }
@@ -3902,7 +3902,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[1]))
-                                               radeon_crtc_handle_flip(rdev, 1);
+                                               radeon_crtc_handle_vblank(rdev, 1);
                                        rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D2 vblank\n");
                                }
index c52c18246ed73b842649fe3eadc002fcda4f41c8..88e3cbe11dad7d0c1d13769de890d62a30b71865 100644 (file)
@@ -276,7 +276,7 @@ static void radeon_unpin_work_func(struct work_struct *__work)
        kfree(work);
 }
 
-void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
+void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id)
 {
        struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
        struct radeon_unpin_work *work;
@@ -302,7 +302,6 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
                 * completion routine.
                 */
                update_pending = 0;
-               radeon_crtc->deferred_flip_completion = 0;
        }
 
        /* Has the pageflip already completed in crtc, or is it certain
@@ -330,10 +329,40 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
                radeon_crtc->deferred_flip_completion = 1;
                spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
                return;
+       } else {
+               spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
+               radeon_crtc_handle_flip(rdev, crtc_id);
+       }
+}
+
+/**
+ * radeon_crtc_handle_flip - page flip completed
+ *
+ * @rdev: radeon device pointer
+ * @crtc_id: crtc number this event is for
+ *
+ * Called when we are sure that a page flip for this crtc is completed.
+ */
+void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
+{
+       struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
+       struct radeon_unpin_work *work;
+       unsigned long flags;
+
+       /* this can happen at init */
+       if (radeon_crtc == NULL)
+               return;
+
+       spin_lock_irqsave(&rdev->ddev->event_lock, flags);
+       work = radeon_crtc->unpin_work;
+       if (work == NULL) {
+               spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
+               return;
        }
 
        /* Pageflip (will be) certainly completed in this vblank. Clean up. */
        radeon_crtc->unpin_work = NULL;
+       radeon_crtc->deferred_flip_completion = 0;
 
        /* wakeup userspace */
        if (work->event)
index b265a8b95fe6f355d3daf345664d50b88d1b8efd..718be1a932ac6b757cce6cd6027b050161af8006 100644 (file)
@@ -907,6 +907,7 @@ bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
 
 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
 
+void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id);
 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
 
 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
index 9922ee5bd497514e444eb5bdf5438728945f4282..dd12dc2a010492bfc676f2bef59f6030045846ca 100644 (file)
@@ -781,7 +781,7 @@ int rs600_irq_process(struct radeon_device *rdev)
                                wake_up(&rdev->irq.vblank_queue);
                        }
                        if (atomic_read(&rdev->irq.pflip[0]))
-                               radeon_crtc_handle_flip(rdev, 0);
+                               radeon_crtc_handle_vblank(rdev, 0);
                }
                if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
                        if (rdev->irq.crtc_vblank_int[1]) {
@@ -790,7 +790,7 @@ int rs600_irq_process(struct radeon_device *rdev)
                                wake_up(&rdev->irq.vblank_queue);
                        }
                        if (atomic_read(&rdev->irq.pflip[1]))
-                               radeon_crtc_handle_flip(rdev, 1);
+                               radeon_crtc_handle_vblank(rdev, 1);
                }
                if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
                        queue_hotplug = true;
index 9739d71cd0a2ccbe21958cc92157ed42b79bfd9f..5c1c0c795e983208304866de53bfd65641435e03 100644 (file)
@@ -6150,7 +6150,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[0]))
-                                               radeon_crtc_handle_flip(rdev, 0);
+                                               radeon_crtc_handle_vblank(rdev, 0);
                                        rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D1 vblank\n");
                                }
@@ -6176,7 +6176,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[1]))
-                                               radeon_crtc_handle_flip(rdev, 1);
+                                               radeon_crtc_handle_vblank(rdev, 1);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D2 vblank\n");
                                }
@@ -6202,7 +6202,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[2]))
-                                               radeon_crtc_handle_flip(rdev, 2);
+                                               radeon_crtc_handle_vblank(rdev, 2);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D3 vblank\n");
                                }
@@ -6228,7 +6228,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[3]))
-                                               radeon_crtc_handle_flip(rdev, 3);
+                                               radeon_crtc_handle_vblank(rdev, 3);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D4 vblank\n");
                                }
@@ -6254,7 +6254,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[4]))
-                                               radeon_crtc_handle_flip(rdev, 4);
+                                               radeon_crtc_handle_vblank(rdev, 4);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D5 vblank\n");
                                }
@@ -6280,7 +6280,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[5]))
-                                               radeon_crtc_handle_flip(rdev, 5);
+                                               radeon_crtc_handle_vblank(rdev, 5);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D6 vblank\n");
                                }