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ARM: dts: imx27-phytec-phycore-som: Fix active level for FEC reset
authorAlexander Shiyan <shc_work@mail.ru>
Sat, 26 Apr 2014 04:52:07 +0000 (08:52 +0400)
committerShawn Guo <shawn.guo@freescale.com>
Fri, 16 May 2014 15:02:03 +0000 (23:02 +0800)
FEC reset GPIO is active low. Fix this typo.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi patch | blob | blame | history

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
index 32cc7dac9ab6e8a017eea90f34c4dd8b93c1b813..93482e9d2c9325addf3c813784fcd40e8d9d0d2b 100644 (file)
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
@@ -182,7 +182,7 @@
 
 &fec {
        phy-mode = "mii";
-       phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
+       phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
        phy-supply = <&reg_3v3>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_fec1>;