MIPS: IP28: Change to build with -mr10k-cache-barrier=store
authorpeter fuerst <post@pfrst.de>
Sun, 17 May 2009 21:49:45 +0000 (23:49 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 20 May 2009 17:53:13 +0000 (18:53 +0100)
Richard Sandiford's new code for inserting the cache-barriers, for GCC
4.3 and above and already incorporated in the current GCC-release, uses
a slightly different option-syntax.

Signed-off-by: peter fuerst <post@pfrst.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/Makefile

index 26947ab852609857e14f55e93103ec1d5811f62e..c4cae9e6b802e9a4fbc6c50fe3b2523dcc71e892 100644 (file)
@@ -473,12 +473,12 @@ endif
 # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys
 #
 ifdef CONFIG_SGI_IP28
-  ifeq ($(call cc-option-yn,-mr10k-cache-barrier=1), n)
-      $(error gcc doesn't support needed option -mr10k-cache-barrier=1)
+  ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n)
+      $(error gcc doesn't support needed option -mr10k-cache-barrier=store)
   endif
 endif
 core-$(CONFIG_SGI_IP28)                += arch/mips/sgi-ip22/
-cflags-$(CONFIG_SGI_IP28)      += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28
+cflags-$(CONFIG_SGI_IP28)      += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28
 load-$(CONFIG_SGI_IP28)                += 0xa800000020004000
 
 #