clk: tegra: don't warn for pll_d2 defaults unnecessarily
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Tue, 25 Jul 2017 10:34:10 +0000 (13:34 +0300)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 23 Aug 2017 22:59:50 +0000 (15:59 -0700)
If the PLL is on, only warn if the defaults are not yet set. Otherwise be
silent.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/tegra/clk-tegra210.c

index a4d7d94b6436cc6ab356570fa0dc8a5bd5a68b64..1e470ca154f64b293be9f6998ad424df9e16cc9e 100644 (file)
@@ -718,8 +718,6 @@ static void plldss_defaults(const char *pll_name, struct tegra_clk_pll *plldss,
        plldss->params->defaults_set = true;
 
        if (val & PLL_ENABLE) {
-               pr_warn("%s already enabled. Postponing set full defaults\n",
-                        pll_name);
 
                /*
                 * PLL is ON: check if defaults already set, then set those
@@ -758,6 +756,10 @@ static void plldss_defaults(const char *pll_name, struct tegra_clk_pll *plldss,
                                (~PLLDSS_MISC1_CFG_EN_SDM));
                }
 
+               if (!plldss->params->defaults_set)
+                       pr_warn("%s already enabled. Postponing set full defaults\n",
+                                pll_name);
+
                /* Enable lock detect */
                if (val & PLLDSS_BASE_LOCK_OVERRIDE) {
                        val &= ~PLLDSS_BASE_LOCK_OVERRIDE;