iwlwifi: pcie: reset write pointer on ict reset
authorEliad Peller <eliad@wizery.com>
Thu, 16 Jul 2015 17:17:42 +0000 (20:17 +0300)
committerEmmanuel Grumbach <emmanuel.grumbach@intel.com>
Tue, 4 Aug 2015 07:17:32 +0000 (10:17 +0300)
Since the CSR_DRAM_INIT_TBL_WRITE_POINTER bit wasn't set
on ict reset, in some flows (like disable ict followed by
immediate reset ict) the driver and hardware went out
of sync (the driver cleared the ict_index, while the hw
kept it intact).

Fix it by setting the flag when resetting ict.

Signed-off-by: Eliad Peller <eliad@wizery.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
drivers/net/wireless/iwlwifi/iwl-csr.h
drivers/net/wireless/iwlwifi/pcie/rx.c

index faa17f2e352adf72b740ffc37dfb03e747b003e1..fa716618735e05b03fdde50edd0205d4877b8020 100644 (file)
@@ -422,6 +422,7 @@ enum {
 
 /* DRAM INT TABLE */
 #define CSR_DRAM_INT_TBL_ENABLE                (1 << 31)
+#define CSR_DRAM_INIT_TBL_WRITE_POINTER        (1 << 28)
 #define CSR_DRAM_INIT_TBL_WRAP_CHECK   (1 << 27)
 
 /*
index 5561dee7b62dab7edeb210fd7ab87a0735160919..454ef1d9a76a8ea1edbbb60b76d56f77e2efe295 100644 (file)
@@ -1443,8 +1443,9 @@ void iwl_pcie_reset_ict(struct iwl_trans *trans)
 
        val = trans_pcie->ict_tbl_dma >> ICT_SHIFT;
 
-       val |= CSR_DRAM_INT_TBL_ENABLE;
-       val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
+       val |= CSR_DRAM_INT_TBL_ENABLE |
+              CSR_DRAM_INIT_TBL_WRAP_CHECK |
+              CSR_DRAM_INIT_TBL_WRITE_POINTER;
 
        IWL_DEBUG_ISR(trans, "CSR_DRAM_INT_TBL_REG =0x%x\n", val);