ARM: dts: imx25-pinfunc: more defines

Add some defines currently missing, fix ordering to make the list
sorted by (mux_reg, mux_val), make sure pins are grouped by mux_reg.

The same definitions are missing from the old pinmux header
(arch/arm/mach-imx/iomux-mx25.h) but as only legacy machine support uses
that and therefor the existing list is obviously good enough I didn't
spend the effort to add the corresponding definitions there, too.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/imx25-pinfunc.h b/arch/arm/boot/dts/imx25-pinfunc.h
index 957cf506e066fda68c436264b57966ef383f5eff..0318cc3fcbb87f2494200dbd28a13f7e50a4d4e0 100644 (file)
--- a/arch/arm/boot/dts/imx25-pinfunc.h
+++ b/arch/arm/boot/dts/imx25-pinfunc.h
@@ -17,48 +17,69 @@
  * <mux_reg conf_reg input_reg mux_mode input_val>
  */
 
+#define MX25_PAD_TDO__TDO                      0x000 0x3e8 0x000 0x00 0x000
+
 #define MX25_PAD_A10__A10                      0x008 0x000 0x000 0x00 0x000
 #define MX25_PAD_A10__GPIO_4_0                 0x008 0x000 0x000 0x05 0x000
 
 #define MX25_PAD_A13__A13                      0x00c 0x22C 0x000 0x00 0x000
 #define MX25_PAD_A13__GPIO_4_1                 0x00c 0x22C 0x000 0x05 0x000
+#define MX25_PAD_A13__LCDC_CLS                 0x00c 0x22C 0x000 0x07 0x000
 
 #define MX25_PAD_A14__A14                      0x010 0x230 0x000 0x10 0x000
 #define MX25_PAD_A14__GPIO_2_0                 0x010 0x230 0x000 0x15 0x000
+#define MX25_PAD_A14__SIM1_CLK1                        0x010 0x230 0x000 0x16 0x000
+#define MX25_PAD_A14__LCDC_SPL                 0x010 0x230 0x000 0x17 0x000
 
 #define MX25_PAD_A15__A15                      0x014 0x234 0x000 0x10 0x000
 #define MX25_PAD_A15__GPIO_2_1                 0x014 0x234 0x000 0x15 0x000
+#define MX25_PAD_A15__SIM1_RST1                        0x014 0x234 0x000 0x16 0x000
+#define MX25_PAD_A15__LCDC_PS                  0x014 0x234 0x000 0x17 0x000
 
 #define MX25_PAD_A16__A16                      0x018 0x000 0x000 0x10 0x000
 #define MX25_PAD_A16__GPIO_2_2                 0x018 0x000 0x000 0x15 0x000
+#define MX25_PAD_A16__SIM1_VEN1                        0x018 0x000 0x000 0x16 0x000
+#define MX25_PAD_A16__LCDC_REV                 0x018 0x000 0x000 0x17 0x000
 
 #define MX25_PAD_A17__A17                      0x01c 0x238 0x000 0x10 0x000
 #define MX25_PAD_A17__GPIO_2_3                 0x01c 0x238 0x000 0x15 0x000
+#define MX25_PAD_A17__SIM1_TX                  0x01c 0x238 0x554 0x16 0x000
+#define MX25_PAD_A17__FEC_TX_ERR               0x01c 0x238 0x000 0x17 0x000
 
 #define MX25_PAD_A18__A18                      0x020 0x23c 0x000 0x10 0x000
 #define MX25_PAD_A18__GPIO_2_4                 0x020 0x23c 0x000 0x15 0x000
+#define MX25_PAD_A18__SIM1_PD1                 0x020 0x23c 0x550 0x16 0x000
 #define MX25_PAD_A18__FEC_COL                  0x020 0x23c 0x504 0x17 0x000
 
 #define MX25_PAD_A19__A19                      0x024 0x240 0x000 0x10 0x000
-#define MX25_PAD_A19__FEC_RX_ERR               0x024 0x240 0x518 0x17 0x000
 #define MX25_PAD_A19__GPIO_2_5                 0x024 0x240 0x000 0x15 0x000
+#define MX25_PAD_A19__SIM1_RX1                 0x024 0x240 0x54c 0x16 0x000
+#define MX25_PAD_A19__FEC_RX_ERR               0x024 0x240 0x518 0x17 0x000
 
 #define MX25_PAD_A20__A20                      0x028 0x244 0x000 0x10 0x000
 #define MX25_PAD_A20__GPIO_2_6                 0x028 0x244 0x000 0x15 0x000
+#define MX25_PAD_A20__SIM2_CLK1                        0x028 0x244 0x000 0x16 0x000
 #define MX25_PAD_A20__FEC_RDATA2               0x028 0x244 0x50c 0x17 0x000
 
 #define MX25_PAD_A21__A21                      0x02c 0x248 0x000 0x10 0x000
 #define MX25_PAD_A21__GPIO_2_7                 0x02c 0x248 0x000 0x15 0x000
+#define MX25_PAD_A21__SIM2_RST1                        0x02c 0x248 0x000 0x16 0x000
 #define MX25_PAD_A21__FEC_RDATA3               0x02c 0x248 0x510 0x17 0x000
 
 #define MX25_PAD_A22__A22                      0x030 0x000 0x000 0x10 0x000
 #define MX25_PAD_A22__GPIO_2_8                 0x030 0x000 0x000 0x15 0x000
+#define MX25_PAD_A22__FEC_TDATA2               0x030 0x000 0x000 0x17 0x000
+#define MX25_PAD_A22__SIM2_VEN1                        0x030 0x000 0x000 0x16 0x000
+#define MX25_PAD_A22__FEC_TDATA2               0x030 0x000 0x000 0x17 0x000
 
 #define MX25_PAD_A23__A23                      0x034 0x24c 0x000 0x10 0x000
 #define MX25_PAD_A23__GPIO_2_9                 0x034 0x24c 0x000 0x15 0x000
+#define MX25_PAD_A23__SIM2_TX1                 0x034 0x24c 0x560 0x16 0x000
+#define MX25_PAD_A23__FEC_TDATA3               0x034 0x24c 0x000 0x17 0x000
 
 #define MX25_PAD_A24__A24                      0x038 0x250 0x000 0x10 0x000
 #define MX25_PAD_A24__GPIO_2_10                        0x038 0x250 0x000 0x15 0x000
+#define MX25_PAD_A24__SIM2_PD1                 0x038 0x250 0x55c 0x16 0x000
 #define MX25_PAD_A24__FEC_RX_CLK               0x038 0x250 0x514 0x17 0x000
 
 #define MX25_PAD_A25__A25                      0x03c 0x254 0x000 0x10 0x000
@@ -369,8 +390,8 @@
 #define MX25_PAD_UART2_RTS__CC1                        0x188 0x380 0x000 0x13 0x000
 #define MX25_PAD_UART2_RTS__GPIO_4_28          0x188 0x380 0x000 0x15 0x000
 
-#define MX25_PAD_UART2_CTS__FEC_RX_ERR         0x18c 0x384 0x518 0x12 0x002
 #define MX25_PAD_UART2_CTS__UART2_CTS          0x18c 0x384 0x000 0x10 0x000
+#define MX25_PAD_UART2_CTS__FEC_RX_ERR         0x18c 0x384 0x518 0x12 0x002
 #define MX25_PAD_UART2_CTS__GPIO_4_29          0x18c 0x384 0x000 0x15 0x000
 
 #define MX25_PAD_SD1_CMD__SD1_CMD              0x190 0x388 0x000 0x10 0x000
@@ -471,20 +492,22 @@
 #define MX25_PAD_DE_B__DE_B                    0x1f0 0x3ec 0x000 0x10 0x000
 #define MX25_PAD_DE_B__GPIO_2_20               0x1f0 0x3ec 0x000 0x15 0x000
 
-#define MX25_PAD_TDO__TDO                      0x000 0x3e8 0x000 0x00 0x000
-
 #define MX25_PAD_GPIO_A__GPIO_A                        0x1f4 0x3f0 0x000 0x10 0x000
 #define MX25_PAD_GPIO_A__CAN1_TX               0x1f4 0x3f0 0x000 0x16 0x000
 #define MX25_PAD_GPIO_A__USBOTG_PWR            0x1f4 0x3f0 0x000 0x12 0x000
 
 #define MX25_PAD_GPIO_B__GPIO_B                        0x1f8 0x3f4 0x000 0x10 0x000
-#define MX25_PAD_GPIO_B__CAN1_RX               0x1f8 0x3f4 0x480 0x16 0x001
 #define MX25_PAD_GPIO_B__USBOTG_OC             0x1f8 0x3f4 0x57c 0x12 0x001
+#define MX25_PAD_GPIO_B__CAN1_RX               0x1f8 0x3f4 0x480 0x16 0x001
 
 #define MX25_PAD_GPIO_C__GPIO_C                        0x1fc 0x3f8 0x000 0x10 0x000
+#define MX25_PAD_GPIO_C__PWM4_PWMO             0x1fc 0x3f8 0x000 0x11 0x000
+#define MX25_PAD_GPIO_C__I2C2_SCL              0x1fc 0x3f8 0x51c 0x12 0x001
+#define MX25_PAD_GPIO_C__KPP_COL4              0x1fc 0x3f8 0x52c 0x13 0x001
 #define MX25_PAD_GPIO_C__CAN2_TX               0x1fc 0x3f8 0x000 0x16 0x000
 
 #define MX25_PAD_GPIO_D__GPIO_D                        0x200 0x3fc 0x000 0x10 0x000
+#define MX25_PAD_GPIO_D__I2C2_SDA              0x200 0x3fc 0x520 0x12 0x001
 #define MX25_PAD_GPIO_D__CAN2_RX               0x200 0x3fc 0x484 0x16 0x001
 
 #define MX25_PAD_GPIO_E__GPIO_E                        0x204 0x400 0x000 0x10 0x000
@@ -505,6 +528,7 @@
 #define MX25_PAD_VSTBY_REQ__VSTBY_REQ          0x214 0x408 0x000 0x10 0x000
 #define MX25_PAD_VSTBY_REQ__AUD7_TXFS          0x214 0x408 0x000 0x14 0x000
 #define MX25_PAD_VSTBY_REQ__GPIO_3_17          0x214 0x408 0x000 0x15 0x000
+
 #define MX25_PAD_VSTBY_ACK__VSTBY_ACK          0x218 0x40c 0x000 0x10 0x000
 #define MX25_PAD_VSTBY_ACK__GPIO_3_18          0x218 0x40c 0x000 0x15 0x000
 
@@ -517,6 +541,7 @@
 
 #define MX25_PAD_BOOT_MODE0__BOOT_MODE0                0x224 0x000 0x000 0x00 0x000
 #define MX25_PAD_BOOT_MODE0__GPIO_4_30         0x224 0x000 0x000 0x05 0x000
+
 #define MX25_PAD_BOOT_MODE1__BOOT_MODE1                0x228 0x000 0x000 0x00 0x000
 #define MX25_PAD_BOOT_MODE1__GPIO_4_31         0x228 0x000 0x000 0x05 0x000