ARM: tegra: set up audio clocks for tegra30 dt
authorStephen Warren <swarren@nvidia.com>
Mon, 26 Mar 2012 22:49:39 +0000 (16:49 -0600)
committerStephen Warren <swarren@nvidia.com>
Wed, 25 Apr 2012 21:22:01 +0000 (15:22 -0600)
Set up the audio clock tree for Tegra30 in an equivalent fashion to the
existing setup for Tegra20.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
arch/arm/mach-tegra/board-dt-tegra30.c

index 5f7c03e972f3dc2654f82022d81129bb5982b0d7..3de21c0b54616e31532f908ba93528b63dc44709 100644 (file)
@@ -57,6 +57,15 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
        /* name         parent          rate            enabled */
        { "uarta",      "pll_p",        408000000,      true },
+       { "pll_a",      "pll_p_out1",   564480000,      true },
+       { "pll_a_out0", "pll_a",        11289600,       true },
+       { "extern1",    "pll_a_out0",   0,              true },
+       { "clk_out_1",  "extern1",      0,              true },
+       { "i2s0",       "pll_a_out0",   11289600,       false},
+       { "i2s1",       "pll_a_out0",   11289600,       false},
+       { "i2s2",       "pll_a_out0",   11289600,       false},
+       { "i2s3",       "pll_a_out0",   11289600,       false},
+       { "i2s4",       "pll_a_out0",   11289600,       false},
        { NULL,         NULL,           0,              0},
 };