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drm/i915/gvt: add cmd_access to GEN7_HALF_SLICE_CHICKEN1
author
Pei Zhang
<pei.zhang@intel.com>
Tue, 21 Feb 2017 13:58:14 +0000
(21:58 +0800)
committer
Zhenyu Wang
<zhenyuw@linux.intel.com>
Thu, 23 Feb 2017 09:32:15 +0000
(17:32 +0800)
Linux guest is using this MMIO in lri command. Add cmd_access flag
for this mmio in gvt to avoid error log.
v2: change the mmio address to its macro name
Signed-off-by: Pei Zhang <pei.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/handlers.c
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diff --git
a/drivers/gpu/drm/i915/gvt/handlers.c
b/drivers/gpu/drm/i915/gvt/handlers.c
index af0c0d1ec9a8a3f3ec44d90f6ba698248cde86cd..bfe12ddb02107dec7f344d23039ee5bb82ed72c7 100644
(file)
--- a/
drivers/gpu/drm/i915/gvt/handlers.c
+++ b/
drivers/gpu/drm/i915/gvt/handlers.c
@@
-1607,7
+1607,7
@@
static int init_generic_mmio_info(struct intel_gvt *gvt)
MMIO_D(0x243c, D_ALL);
MMIO_DFH(0x7018, D_ALL, F_MODE_MASK, NULL, NULL);
MMIO_DFH(HALF_SLICE_CHICKEN3, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
- MMIO_DFH(
0xe100, D_ALL, F_MODE_MASK
, NULL, NULL);
+ MMIO_DFH(
GEN7_HALF_SLICE_CHICKEN1, D_ALL, F_MODE_MASK | F_CMD_ACCESS
, NULL, NULL);
/* display */
MMIO_F(0x60220, 0x20, 0, 0, 0, D_ALL, NULL, NULL);