drm/i915: gen6_enable_rps() wants to be called after ring initialisation
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 9 May 2012 10:56:28 +0000 (11:56 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 19 May 2012 20:38:29 +0000 (22:38 +0200)
Currently we call gen6_enable_rps() (which writes into the per-ring
register mmio space) from intel_modeset_init_hw() which is called before
we initialise the rings. If we defer intel_modeset_init_hw() until
afterwards (in the intel_modeset_gem_init() phase) all is well.

v2: Rectify ordering of gem vs display HW init upon resume. (Daniel)

v3: Fix up locking. (Paulo)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Smash Paulo's locking fix onto Chris' patch.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_suspend.c
drivers/gpu/drm/i915/intel_display.c

index 1ccfc23d1abfeee2c46e72b24870b490509c450a..88d329088927c6efbb6be08e3586d423e2330969 100644 (file)
@@ -624,15 +624,16 @@ static int i915_drm_thaw(struct drm_device *dev)
 
        /* KMS EnterVT equivalent */
        if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+               if (HAS_PCH_SPLIT(dev))
+                       ironlake_init_pch_refclk(dev);
+
                mutex_lock(&dev->struct_mutex);
                dev_priv->mm.suspended = 0;
 
                error = i915_gem_init_hw(dev);
                mutex_unlock(&dev->struct_mutex);
 
-               if (HAS_PCH_SPLIT(dev))
-                       ironlake_init_pch_refclk(dev);
-
+               intel_modeset_init_hw(dev);
                drm_mode_config_reset(dev);
                drm_irq_install(dev);
 
@@ -640,9 +641,6 @@ static int i915_drm_thaw(struct drm_device *dev)
                mutex_lock(&dev->mode_config.mutex);
                drm_helper_resume_force_mode(dev);
                mutex_unlock(&dev->mode_config.mutex);
-
-               if (IS_IRONLAKE_M(dev))
-                       ironlake_enable_rc6(dev);
        }
 
        intel_opregion_init(dev);
index 73a5c3c12fe0dbc04c4988c3f6d5d56fe67ec655..0ede02a99d914544d145b043b1ea066b5254bb02 100644 (file)
@@ -876,12 +876,6 @@ int i915_restore_state(struct drm_device *dev)
                I915_WRITE(IER, dev_priv->saveIER);
                I915_WRITE(IMR, dev_priv->saveIMR);
        }
-       mutex_unlock(&dev->struct_mutex);
-
-       if (drm_core_check_feature(dev, DRIVER_MODESET))
-               intel_modeset_init_hw(dev);
-
-       mutex_lock(&dev->struct_mutex);
 
        /* Cache mode state */
        I915_WRITE(CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
index 1cbe2680fdec04aa7daf252b914d872d9d2111e0..42b9e20782b08bffb1c519c3cb3a19c0f5e2b15b 100644 (file)
@@ -6658,6 +6658,7 @@ void intel_modeset_init_hw(struct drm_device *dev)
 
        if (IS_IRONLAKE_M(dev)) {
                ironlake_enable_drps(dev);
+               ironlake_enable_rc6(dev);
                intel_init_emon(dev);
        }
 
@@ -6719,8 +6720,6 @@ void intel_modeset_init(struct drm_device *dev)
        i915_disable_vga(dev);
        intel_setup_outputs(dev);
 
-       intel_modeset_init_hw(dev);
-
        INIT_WORK(&dev_priv->idle_work, intel_idle_update);
        setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,
                    (unsigned long)dev);
@@ -6728,8 +6727,7 @@ void intel_modeset_init(struct drm_device *dev)
 
 void intel_modeset_gem_init(struct drm_device *dev)
 {
-       if (IS_IRONLAKE_M(dev))
-               ironlake_enable_rc6(dev);
+       intel_modeset_init_hw(dev);
 
        intel_setup_overlay(dev);
 }