drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Mon, 29 Oct 2012 14:59:26 +0000 (16:59 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sun, 11 Nov 2012 22:51:09 +0000 (23:51 +0100)
Make intel_render_ring_init_dri and intel_init_ring_buffer symmetrical
with regards of workaround introduced by:

commit 27c1cbd06a7620b354cbb363834f3bb8df4f410d
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Apr 9 13:59:46 2012 +0100

    drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_ringbuffer.c

index 785df4fbff217c259aeeba136096e4f062ff5059..b13393b593b819f78b18ea01219d2046fac074bf 100644 (file)
@@ -1590,7 +1590,7 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
 
        ring->size = size;
        ring->effective_size = ring->size;
-       if (IS_I830(ring->dev))
+       if (IS_I830(ring->dev) || IS_845G(ring->dev))
                ring->effective_size -= 128;
 
        ring->virtual_start = ioremap_wc(start, size);