drm/i915/edp: Add WaKVMNotificationOnConfigChange:bdw
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Tue, 7 Jun 2016 14:19:02 +0000 (17:19 +0300)
committerMika Kuoppala <mika.kuoppala@intel.com>
Wed, 8 Jun 2016 13:23:09 +0000 (16:23 +0300)
According to bspec this workaround helps to reduce lag and improve
performance on edp.

Documentation suggests this for bdw and all gen9. However evidence
shows that this register is missing on gen9 and causing unclaimed mmio
access if we access it. So apply to bdw only where the reg
exists and can hold its value.

v2: drop skl

References: HSD#2134579
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-11-git-send-email-mika.kuoppala@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c

index 4ea2253423dc621abb83fa8f87bf18c915c3560a..371b56cb7411a320ee0f639ccd0a24a72cbcdcd8 100644 (file)
@@ -6035,6 +6035,9 @@ enum skl_disp_power_wells {
 #define  FORCE_ARB_IDLE_PLANES (1 << 14)
 #define  SKL_EDP_PSR_FIX_RDWRAP        (1 << 3)
 
+#define CHICKEN_PAR2_1         _MMIO(0x42090)
+#define  KVM_CONFIG_CHANGE_NOTIFICATION_SELECT (1 << 14)
+
 #define _CHICKEN_PIPESL_1_A    0x420b0
 #define _CHICKEN_PIPESL_1_B    0x420b4
 #define  HSW_FBCQ_DIS                  (1 << 22)
index be8a96743e865a0c3afc8063e2c0257fbb24f80c..45b304e844dd44884797c5511b90979d9da70087 100644 (file)
@@ -7030,6 +7030,10 @@ static void broadwell_init_clock_gating(struct drm_device *dev)
         */
        I915_WRITE(HSW_GTT_CACHE_EN, GTT_CACHE_EN_ALL);
 
+       /* WaKVMNotificationOnConfigChange:bdw */
+       I915_WRITE(CHICKEN_PAR2_1, I915_READ(CHICKEN_PAR2_1)
+                  | KVM_CONFIG_CHANGE_NOTIFICATION_SELECT);
+
        lpt_init_clock_gating(dev);
 }